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| author | Apexo | 2026-03-28 23:40:53 +0100 |
|---|---|---|
| committer | Apexo | 2026-03-28 23:40:53 +0100 |
| commit | 1b194ac4578dea8e71b0d61d1cb4d875f435ba71 (patch) | |
| tree | 786019a0c6f34b458f3272bf2ecbde0de1976e0a /src/peripherals/avrdx-vref.ts | |
| download | anduril-sim-1b194ac4578dea8e71b0d61d1cb4d875f435ba71.tar.gz anduril-sim-1b194ac4578dea8e71b0d61d1cb4d875f435ba71.tar.bz2 anduril-sim-1b194ac4578dea8e71b0d61d1cb4d875f435ba71.zip | |
D3AA simulator
Diffstat (limited to '')
| -rw-r--r-- | src/peripherals/avrdx-vref.ts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/peripherals/avrdx-vref.ts b/src/peripherals/avrdx-vref.ts new file mode 100644 index 0000000..0097096 --- /dev/null +++ b/src/peripherals/avrdx-vref.ts @@ -0,0 +1,32 @@ +// AVR-Dx VREF peripheral +// Voltage reference selection for DAC0 and ADC0 + +import { CPU } from 'avr8js/cpu/cpu'; + +const ADC0REF = 0; +const DAC0REF = 2; + +const VREF_VOLTAGES = [1.024, 2.048, 2.500, 4.096] as const; + +export class AVRDxVREF { + constructor(private cpu: CPU, private base: number) { + } + + /** Get DAC Vref selection (raw register value) */ + get dacRef(): number { + return this.cpu.data[this.base + DAC0REF] & 0x07; + } + + get dacRefVolts(): number { + return VREF_VOLTAGES[this.dacRef] ?? 0; + } + + /** Get ADC Vref selection (raw register value) */ + get adcRef(): number { + return this.cpu.data[this.base + ADC0REF] & 0x07; + } + + get adcRefVolts(): number { + return VREF_VOLTAGES[this.adcRef] ?? 0; + } +} |
