From 1b194ac4578dea8e71b0d61d1cb4d875f435ba71 Mon Sep 17 00:00:00 2001 From: Apexo Date: Sat, 28 Mar 2026 23:40:53 +0100 Subject: D3AA simulator --- src/peripherals/avrdx-ccp.ts | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 src/peripherals/avrdx-ccp.ts (limited to 'src/peripherals/avrdx-ccp.ts') diff --git a/src/peripherals/avrdx-ccp.ts b/src/peripherals/avrdx-ccp.ts new file mode 100644 index 0000000..a4f0370 --- /dev/null +++ b/src/peripherals/avrdx-ccp.ts @@ -0,0 +1,29 @@ +// CCP - Configuration Change Protection +// When 0xD8 (IOREG) or 0x9D (SPM) is written to CCP, a 4-cycle window opens +// during which protected registers can be written. + +import type { CPU } from 'avr8js/cpu/cpu'; + +const ADDR = 0; + +const SPM = 0x9D; +const IOREG = 0xD8; + +export class AVRDxCCP { + private unlockedUntil = -Infinity; + + constructor(private cpu: CPU, base: number) { + cpu.writeHooks[base + ADDR] = (value) => { + if (value === IOREG || value === SPM) { + // TODO: adjust for cycle scaling(?) + this.unlockedUntil = cpu.cycles + 4; + } + cpu.data[base + ADDR] = value; + return true; + }; + } + + isUnlocked(): boolean { + return this.cpu.cycles <= this.unlockedUntil; + } +} -- cgit v1.2.3