From 1b194ac4578dea8e71b0d61d1cb4d875f435ba71 Mon Sep 17 00:00:00 2001
From: Apexo
Date: Sat, 28 Mar 2026 23:40:53 +0100
Subject: D3AA simulator

---
 src/peripherals/avrdx-rstctrl.ts | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 src/peripherals/avrdx-rstctrl.ts

(limited to 'src/peripherals/avrdx-rstctrl.ts')

diff --git a/src/peripherals/avrdx-rstctrl.ts b/src/peripherals/avrdx-rstctrl.ts
new file mode 100644
index 0000000..370b9c3
--- /dev/null
+++ b/src/peripherals/avrdx-rstctrl.ts
@@ -0,0 +1,30 @@
+// AVR-Dx RSTCTRL - Reset Controller
+// Handles software reset and reset flags.
+
+import { type CPU } from 'avr8js/cpu/cpu';
+import { type AVRDxCCP } from './avrdx-ccp';
+
+export const RSTFR = 0;
+export const SWRR  = 1;
+export const SWRST_bm = 0x01;
+
+export class AVRDxRSTCTRL {
+  /** Set this callback to handle software resets */
+  onReset: (() => void) | null = null;
+
+  constructor(cpu: CPU, base: number, ccp: AVRDxCCP) {
+    // RSTFR - reset flags, write 1 to clear
+    cpu.writeHooks[base + RSTFR] = (value) => {
+      cpu.data[base + RSTFR] &= ~value;
+      return true;
+    };
+
+    // SWRR - software reset register (CCP protected)
+    cpu.writeHooks[base + SWRR] = (value) => {
+      if (ccp.isUnlocked() && (value & SWRST_bm)) {
+        if (this.onReset) this.onReset();
+      }
+      return true;
+    };
+  }
+}
-- 
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