diff options
| author | Selene ToyKeeper | 2023-10-27 03:47:01 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2023-10-27 03:47:01 -0600 |
| commit | 1679fdfa41a27966149b8dd1d28f676e59aaeeb2 (patch) | |
| tree | 4ce243c93c1ac64456a0ba6da508fc5b389045b4 | |
| parent | converted blf-q8-t1616 to new API, using wurkkos-ts10 and wurkkos-ts25 as a base (diff) | |
| download | anduril-1679fdfa41a27966149b8dd1d28f676e59aaeeb2.tar.gz anduril-1679fdfa41a27966149b8dd1d28f676e59aaeeb2.tar.bz2 anduril-1679fdfa41a27966149b8dd1d28f676e59aaeeb2.zip | |
converted gchart-fet1-t1616 to new API
(is almost identical to a wurkkos-ts10)
Diffstat (limited to '')
| -rw-r--r-- | hwdef-gchart-fet1-t1616.h | 104 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/cfg-gchart-fet1-t1616.h | 66 |
2 files changed, 112 insertions, 58 deletions
diff --git a/hwdef-gchart-fet1-t1616.h b/hwdef-gchart-fet1-t1616.h index 9625738..2d2b7a6 100644 --- a/hwdef-gchart-fet1-t1616.h +++ b/hwdef-gchart-fet1-t1616.h @@ -1,5 +1,5 @@ // gChart's custom FET+1 driver layout -// Copyright (C) 2020-2023 (FIXME) +// Copyright (C) 2020-2023 gchart, Selene ToyKeeper // SPDX-License-Identifier: GPL-3.0-or-later #pragma once @@ -11,60 +11,82 @@ * Read voltage from VCC pin, has diode with ~0.4v drop */ - -#define LAYOUT_DEFINED - -#ifdef ATTINY -#undef ATTINY -#endif #define ATTINY 1616 #include <avr/io.h> -#define PWM_CHANNELS 2 +// nearly all t1616-based FET+1 drivers work pretty much the same +// (this one has single-color aux like the TS10) +#define HWDEF_C_FILE hwdef-wurkkos-ts10.c -#ifndef SWITCH_PIN -#define SWITCH_PIN PIN2_bp -#define SWITCH_PORT VPORTB.IN -#define SWITCH_ISC_REG PORTB.PIN2CTRL -#define SWITCH_VECT PORTB_PORT_vect -#define SWITCH_INTFLG VPORTB.INTFLAGS -#endif +// allow using aux LEDs as extra channel modes +#include "chan-aux.h" +// channel modes: +// * 0. FET+7135 stacked +// * 1. aux LEDs +#define NUM_CHANNEL_MODES 2 +enum CHANNEL_MODES { + CM_MAIN = 0, + CM_AUX +}; -// 7135 channel -#ifndef PWM1_PIN -#define PWM1_PIN PB1 // -#define PWM1_LVL TCA0.SINGLE.CMP1 // CMP1 is the output compare register for PB1 -#endif +#define DEFAULT_CHANNEL_MODE CM_MAIN -// FET channel -#ifndef PWM2_PIN -#define PWM2_PIN PB0 // -#define PWM2_LVL TCA0.SINGLE.CMP0 // CMP0 is the output compare register for PB0 -#endif +// right-most bit first, modes are in fedcba9876543210 order +#define CHANNEL_MODES_ENABLED 0b00000001 + + +#define PWM_CHANNELS 2 // old, remove this + +#define PWM_BITS 16 // dynamic 16-bit, but never goes over 255 +#define PWM_GET PWM_GET8 +#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255) +#define PWM_DATATYPE2 uint16_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint8_t // 1x7135 ramp +#define PWM2_DATATYPE uint8_t // DD FET ramp + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM +#define PWM_TOP_INIT 255 // highest value used in top half of ramp +// not necessary when double-buffered "BUF" registers are used +#define PWM_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment + +// 1x7135 channel +#define CH1_PIN PB1 +#define CH1_PWM TCA0.SINGLE.CMP1BUF // CMP1 is the output compare register for PB1 + +// DD FET channel +#define CH2_PIN PB0 +#define CH2_PWM TCA0.SINGLE.CMP0BUF // CMP0 is the output compare register for PB0 + +// e-switch +#define SWITCH_PIN PIN2_bp +#define SWITCH_PORT VPORTB.IN +#define SWITCH_ISC_REG PORTB.PIN2CTRL +#define SWITCH_VECT PORTB_PORT_vect +#define SWITCH_INTFLG VPORTB.INTFLAGS // average drop across diode on this hardware #ifndef VOLTAGE_FUDGE_FACTOR #define VOLTAGE_FUDGE_FACTOR 8 // 4 = add 0.20V #endif - // lighted button -#ifndef AUXLED_PIN -#define AUXLED_PIN PIN3_bp -#define AUXLED_PORT PORTB -#endif +#define AUXLED_PIN PIN3_bp +#define AUXLED_PORT PORTB -// with so many pins, doing this all with #ifdefs gets awkward... -// ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { // set up the system clock to run at 10 MHz instead of the default 3.33 MHz - _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); + _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, + CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); //VPORTA.DIR = 0b00000010; - VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm; + // Outputs + VPORTB.DIR = PIN0_bm // DD FET + | PIN1_bm // 7135 + | PIN3_bm; // Aux LED //VPORTC.DIR = 0b00000000; // enable pullups on the input pins to reduce power @@ -97,8 +119,16 @@ inline void hwdef_setup() { // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc // See the manual for other pins, clocks, configs, portmux, etc - TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc; - TCA0.SINGLE.PER = 255; - TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm; + TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm + | TCA_SINGLE_CMP1EN_bm + | TCA_SINGLE_WGMODE_DSBOTTOM_gc; + TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc + | TCA_SINGLE_ENABLE_bm; + + PWM_TOP = PWM_TOP_INIT; + } + +#define LAYOUT_DEFINED + diff --git a/spaghetti-monster/anduril/cfg-gchart-fet1-t1616.h b/spaghetti-monster/anduril/cfg-gchart-fet1-t1616.h index eb17399..4082fca 100644 --- a/spaghetti-monster/anduril/cfg-gchart-fet1-t1616.h +++ b/spaghetti-monster/anduril/cfg-gchart-fet1-t1616.h @@ -1,5 +1,5 @@ // gChart's custom FET+1 driver config options for Anduril -// Copyright (C) 2020-2023 (FIXME) +// Copyright (C) 2020-2023 gchart, Selene ToyKeeper // SPDX-License-Identifier: GPL-3.0-or-later #pragma once @@ -15,25 +15,49 @@ // lockout: blinking (3) #define INDICATOR_LED_DEFAULT_MODE ((3<<2) + 1) +#define RAMP_SIZE 150 + +// 7135 at 90/150 +// level_calc.py 5.7895 2 150 7135 0 0.1 125.25 FET 1 10 1200 --pwm dyn:61:4096:255:2.5 --clock 5:11:2.0 +// (with heavy manual tweaks up to ~15/150) +#define PWM1_LEVELS 1, 1, 2, 2, 3, 3, 4, 5, 6, 6, 8, 9, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 23, 23, 24, 25, 26, 26, 27, 27, 28, 28, 29, 29, 30, 30, 31, 31, 32, 32, 33, 33, 34, 35, 36, 37, 38, 40, 41, 43, 45, 47, 50, 53, 56, 60, 63, 67, 71, 75, 79, 84, 89, 94, 99,104,110,116,122,129,136,143,150,158,166,174,183,192,202,211,222,232,243,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0 +#define PWM2_LEVELS 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 3, 5, 7, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 29, 31, 34, 37, 39, 42, 45, 48, 51, 54, 58, 61, 65, 68, 72, 76, 80, 84, 88, 93, 97,102,107,112,117,122,127,133,139,145,151,157,163,170,177,183,191,198,205,213,221,229,238,246,255 +#define PWM_TOPS 4095,2893,3917,2806,3252,2703,2684,2660,2640,2370,3000,2900,2630,2549,2246,2193,2030,1961,1889,1716,1642,1569,1497,1428,1290,1232,1176,1122,1070,976,932,890,849,779,745,685,656,605,579,536,514,476,457,424,407,379,364,340,327,314,302,291,280,276,266,262,257,253,253,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 +#define MAX_1x7135 90 +#define MIN_THERM_STEPDOWN 60 +#define HALFSPEED_LEVEL 11 +#define QUARTERSPEED_LEVEL 5 +#define DEFAULT_LEVEL 50 + +#define RAMP_SMOOTH_FLOOR 1 +#define RAMP_SMOOTH_CEIL 130 +// 10 30 50 70 [90] 110 130 +#define RAMP_DISCRETE_FLOOR 10 +#define RAMP_DISCRETE_CEIL 130 +#define RAMP_DISCRETE_STEPS 7 + +// 10 30 50 70 [90] 110 130 +#define SIMPLE_UI_FLOOR 10 +#define SIMPLE_UI_CEIL 130 +#define SIMPLE_UI_STEPS 7 + +// stop panicking at ~50% power +#define THERM_FASTER_LEVEL 130 // throttle back faster when high + +// show each channel while it scroll by in the menu +#define USE_CONFIG_COLORS + +// blink numbers on the aux LEDs by default +//#define DEFAULT_BLINK_CHANNEL CM_AUX + +// the default of 26 looks a bit rough, so increase it to make it smoother +#define CANDLE_AMPLITUDE 40 + +// don't blink mid-ramp +#ifdef BLINK_AT_RAMP_MIDDLE #undef BLINK_AT_RAMP_MIDDLE +#endif + +// enable factory reset on 13H without loosening tailcap (required) +#define USE_SOFT_FACTORY_RESET -// Mostly borrowed from the D4 for now -#define RAMP_LENGTH 150 -#define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0 -#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,4,5,7,8,9,11,12,14,15,17,19,20,22,24,25,27,29,31,33,35,37,39,41,43,45,48,50,52,55,57,59,62,64,67,70,72,75,78,81,84,87,90,93,96,99,102,105,109,112,115,119,122,126,129,133,137,141,144,148,152,156,160,165,169,173,177,182,186,191,195,200,205,209,214,219,224,229,234,239,244,250,255 -#define MAX_1x7135 65 -#define HALFSPEED_LEVEL 14 -#define QUARTERSPEED_LEVEL 6 - -#define RAMP_SMOOTH_FLOOR 1 -#define RAMP_SMOOTH_CEIL 120 -// 10, 28, 46, [65], 83, 101, 120 -#define RAMP_DISCRETE_FLOOR 10 -#define RAMP_DISCRETE_CEIL RAMP_SMOOTH_CEIL -#define RAMP_DISCRETE_STEPS 7 - -// stop panicking at ~30% power -#define THERM_FASTER_LEVEL 105 - -// enable 2 click turbo -#define DEFAULT_2C_STYLE 1 |
