converted noctigon-m44 to use PWM+DSM instead of PWM+PFM (dynamic PWM)

(this gives better, smoother low modes and reduced flicker)

6 files changed, 185 insertions, 105 deletions

diff --git a/hwdef-emisar-d4k-3ch.c b/hwdef-emisar-d4k-3ch.c
index 58e9b35..ba6643d 100644
--- a/hwdef-emisar-d4k-3ch.c
+++ b/hwdef-emisar-d4k-3ch.c
@@ -262,6 +262,7 @@ void set_level_auto3(uint8_t level) {
 }
 
 ///// "gradual tick" functions for smooth thermal regulation /////
+// (and other smooth adjustments)
 
 bool gradual_adjust(PWM_DATATYPE main2, PWM_DATATYPE led3, PWM_DATATYPE led4) {
     // adjust multiple times based on current brightness
diff --git a/hwdef-emisar-d4k-3ch.h b/hwdef-emisar-d4k-3ch.h
index 59e6f01..581f51c 100644
--- a/hwdef-emisar-d4k-3ch.h
+++ b/hwdef-emisar-d4k-3ch.h
@@ -27,8 +27,6 @@
  *  20    PA7   e-switch (PCINT7)
  *      ADC12   thermal sensor
  *
- * All 3 channels share a single Opamp enable pin,
- * but have individual PWM controls.
  * PWM speed + resolution is dynamic on 2 channels,
  * and 8-bit 16 kHz on 1 channel.
  *
diff --git a/hwdef-noctigon-m44.c b/hwdef-noctigon-m44.c
index 776cb82..0b7f027 100644
--- a/hwdef-noctigon-m44.c
+++ b/hwdef-noctigon-m44.c
@@ -1,7 +1,6 @@
 // hwdef for Noctigon M44 2-channel light
 // Copyright (C) 2023 Selene ToyKeeper
 // SPDX-License-Identifier: GPL-3.0-or-later
-
 #pragma once
 
 #include "chan-rgbaux.c"
@@ -52,20 +51,39 @@ Channel channels[] = {
 };
 
 
+void set_level_zero() {
+    // disable timer 1 overflow interrupt
+    // (helps improve button press handling from Off state)
+    TIMSK &= ~(1 << TOIE1);
+
+    // turn off all LEDs
+    ch1_dsm_lvl = 0;
+    ch2_dsm_lvl = 0;
+    CH1_PWM     = 0;
+    CH2_PWM     = 0;
+    PWM_CNT     = 0;
+    CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable opamp
+    CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN);  // disable opamp
+}
+
+
+// wrap setting the dsm vars, to get a faster response
+// (just setting *_dsm_lvl doesn't work well for strobes)
 // set new values for both channels,
 // handling any possible combination
 // and any before/after state
-void set_pwms(uint16_t ch1_pwm, uint16_t ch2_pwm, uint16_t top,
-              uint8_t ch1_on, uint8_t ch2_on) {
+void set_hw_levels(PWM_DATATYPE ch1, PWM_DATATYPE ch2,
+                   bool ch1_on,      bool ch2_on) {
 
     bool was_on = (CH1_PWM>0) || (CH2_PWM>0)
                 || ( CH1_ENABLE_PORT & (1 << CH1_ENABLE_PIN) )
                 || ( CH2_ENABLE_PORT & (1 << CH2_ENABLE_PIN) );
-    bool now_on = (ch1_pwm>0) || (ch2_pwm>0) || ch1_on || ch2_on;
+    //bool now_on = (ch1>0) || (ch2>0) || ch1_on || ch2_on;
 
+    #if 0  // not needed any more, after switching to PWM+DSM
     // phase-correct PWM at zero (for flicker-free moon),
     // fast PWM otherwise
-    if (ch1_pwm || ch2_pwm)
+    if (ch1 || ch2)
         TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
                 | (1<<WGM13)  | (1<<WGM12)  // fast adjustable PWM (DS table 12-5)
                 //| (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
@@ -75,136 +93,170 @@ void set_pwms(uint16_t ch1_pwm, uint16_t ch2_pwm, uint16_t top,
                 //| (1<<WGM13)  | (1<<WGM12)  // fast adjustable PWM (DS table 12-5)
                 | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
                 ;
+    #endif
 
-    if (ch1_pwm || ch1_on)
+    if (ch1 || ch1_on)
         CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN);  // enable opamp
     else
         CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable opamp
 
-    if (ch2_pwm || ch2_on)
+    if (ch2 || ch2_on)
         CH2_ENABLE_PORT |= (1 << CH2_ENABLE_PIN);  // enable opamp
     else
         CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN);  // disable opamp
 
-    CH1_PWM = ch1_pwm;
-    CH2_PWM = ch2_pwm;
+    // set delta-sigma soft levels
+    ch1_dsm_lvl = ch1;
+    ch2_dsm_lvl = ch2;
 
+    // set hardware PWM levels and init dsm loop
+    CH1_PWM = ch1_pwm = ch1 >> 7;
+    CH2_PWM = ch2_pwm = ch2 >> 7;
+
+    #if 0  // not needed any more, after switching to PWM+DSM
     // manual phase sync when changing level while already on
     if (was_on && now_on) while(PWM_CNT > (top - 32)) {}
 
     PWM_TOP = top;
+    #endif
+
+    // enable timer 1 overflow interrupt so DSM can work
+    TIMSK |= (1 << TOIE1);
 
     // reset phase when turning on or off
     //if ((! was_on) | (! now_on)) PWM_CNT = 0;
     if (! was_on) PWM_CNT = 0;
+
 }
 
-void set_level_zero() {
-    CH1_PWM = 0;
-    CH2_PWM = 0;
-    PWM_TOP = PWM_TOP_INIT;
-    PWM_CNT = 0;
-    CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable opamp
-    CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN);  // disable opamp
+// delta-sigma modulation of PWM outputs
+// happens on each Timer0 overflow (every 512 cpu clock cycles)
+// uses 8-bit pwm w/ 7-bit dsm (0b 0PPP PPPP PDDD DDDD)
+ISR(TIMER1_OVF_vect) {
+    // set new hardware values first,
+    // for best timing (reduce effect of interrupt jitter)
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+
+    // calculate next values, now that timing matters less
+
+    // accumulate error
+    ch1_dsm += (ch1_dsm_lvl & 0x007f);
+    // next PWM = base PWM value + carry bit
+    ch1_pwm  = (ch1_dsm_lvl >> 7) + (ch1_dsm > 0x7f);
+    // clear carry bit
+    ch1_dsm &= 0x7f;
+
+    // repeat for other channels
+
+    ch2_dsm += (ch2_dsm_lvl & 0x007f);
+    ch2_pwm  = (ch2_dsm_lvl >> 7) + (ch2_dsm > 0x7f);
+    ch2_dsm &= 0x7f;
 }
 
+
 void set_level_ch1(uint8_t level) {
-    uint16_t pwm = PWM_GET(pwm1_levels, level);
-    uint16_t top = PWM_GET(pwm_tops, level);
-    set_pwms(pwm, 0, top, 1, 0);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, level);
+    set_hw_levels(pwm, 0,
+                  1,   0);
 }
 
 void set_level_ch2(uint8_t level) {
-    uint16_t pwm = PWM_GET(pwm1_levels, level);
-    uint16_t top = PWM_GET(pwm_tops, level);
-    set_pwms(0, pwm, top, 0, 1);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, level);
+    set_hw_levels(0, pwm,
+                  0, 1);
 }
 
 void set_level_both(uint8_t level) {
-    uint16_t pwm = PWM_GET(pwm1_levels, level);
-    uint16_t top = PWM_GET(pwm_tops, level);
-    set_pwms(pwm, pwm, top, 1, 1);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, level);
+    set_hw_levels(pwm, pwm,
+                  1,   1);
 }
 
-void set_level_blend(uint8_t level) {
-    PWM_DATATYPE ch1_pwm, ch2_pwm;
+void blend_helper(PWM_DATATYPE *warm, PWM_DATATYPE *cool, uint8_t level) {
     PWM_DATATYPE brightness = PWM_GET(pwm1_levels, level);
-    PWM_DATATYPE top        = PWM_GET(pwm_tops, level);
-    uint8_t blend           = cfg.channel_mode_args[channel_mode];
+    uint8_t blend;
+    if (channel_mode == CM_AUTO) {
+        blend = 255 * (uint16_t)level / RAMP_SIZE;
+        if (cfg.channel_mode_args[channel_mode] & 0b01000000)
+            blend = 255 - blend;
+    } else {
+        blend = cfg.channel_mode_args[channel_mode];
+    }
 
-    calc_2ch_blend(&ch1_pwm, &ch2_pwm, brightness, top, blend);
+    calc_2ch_blend(warm, cool, brightness, DSM_TOP, blend);
+}
 
+void set_level_blend(uint8_t level) {
+    PWM_DATATYPE warm, cool;
+    uint8_t blend = cfg.channel_mode_args[channel_mode];
+    blend_helper(&warm, &cool, level);
     // don't turn off either emitter entirely while using middle blends
-    set_pwms(ch1_pwm, ch2_pwm, top,
-             blend < 255, blend > 0);
+    set_hw_levels(warm,        cool,
+                  blend < 255, blend > 0);
 }
 
 void set_level_auto(uint8_t level) {
-    PWM_DATATYPE ch1_pwm, ch2_pwm;
-    PWM_DATATYPE brightness = PWM_GET(pwm1_levels, level);
-    PWM_DATATYPE top        = PWM_GET(pwm_tops, level);
-    uint8_t blend           = 255 * (uint16_t)level / RAMP_SIZE;
-    if (cfg.channel_mode_args[channel_mode] & 0b01000000)
-        blend = 255 - blend;
-
-    calc_2ch_blend(&ch1_pwm, &ch2_pwm, brightness, top, blend);
-
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, level);
     // don't turn off either emitter entirely
     // (it blinks pretty bright when the regulator turns on mid-ramp)
-    set_pwms(ch1_pwm, ch2_pwm, top, 1, 1);
+    set_hw_levels(warm, cool,
+                  1,    1);
 }
 
+///// "gradual tick" functions for smooth thermal regulation /////
+// (and other smooth adjustments)
 
 ///// bump each channel toward a target value /////
-bool gradual_adjust(uint16_t ch1_pwm, uint16_t ch2_pwm) {
-    GRADUAL_ADJUST_SIMPLE(ch1_pwm, CH1_PWM);
-    GRADUAL_ADJUST_SIMPLE(ch2_pwm, CH2_PWM);
+bool gradual_adjust(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
+    // adjust multiple times based on current brightness
+    // (so it adjusts faster/coarser when bright, slower/finer when dim)
+
+    // higher shift = slower/finer adjustments
+    const uint8_t shift = 9;  // ((255 << 7) >> 9) = 63 max
+    uint8_t steps;
+
+    steps = ch1_dsm_lvl >> shift;
+    for (uint8_t i=0; i<=steps; i++)
+        GRADUAL_ADJUST_SIMPLE(ch1, ch1_dsm_lvl);
+
+    steps = ch2_dsm_lvl  >> shift;
+    for (uint8_t i=0; i<=steps; i++)
+        GRADUAL_ADJUST_SIMPLE(ch2, ch2_dsm_lvl);
 
-    // check for completion
-    if ((ch1_pwm == CH1_PWM)
-     && (ch2_pwm == CH2_PWM)) {
+    if ((ch1 == ch1_dsm_lvl)
+     && (ch2 == ch2_dsm_lvl )) {
         return true;  // done
     }
     return false;  // not done yet
 }
 
 bool gradual_tick_ch1(uint8_t gt) {
-    uint16_t pwm = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
     return gradual_adjust(pwm, 0);
 }
 
 bool gradual_tick_ch2(uint8_t gt) {
-    uint16_t pwm = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
     return gradual_adjust(0, pwm);
 }
 
 bool gradual_tick_both(uint8_t gt) {
-    uint16_t pwm = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
     return gradual_adjust(pwm, pwm);
 }
 
 bool gradual_tick_blend(uint8_t gt) {
-    PWM_DATATYPE ch1_pwm, ch2_pwm;
-    PWM_DATATYPE brightness = PWM_GET(pwm1_levels, gt);
-    PWM_DATATYPE top        = PWM_GET(pwm_tops, gt);
-    uint8_t blend           = cfg.channel_mode_args[channel_mode];
-
-    calc_2ch_blend(&ch1_pwm, &ch2_pwm, brightness, top, blend);
-
-    return gradual_adjust(ch1_pwm, ch2_pwm);
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, gt);
+    return gradual_adjust(warm, cool);
 }
 
 bool gradual_tick_auto(uint8_t gt) {
-    PWM_DATATYPE ch1_pwm, ch2_pwm;
-    PWM_DATATYPE brightness = PWM_GET(pwm1_levels, gt);
-    PWM_DATATYPE top        = PWM_GET(pwm_tops, gt);
-    uint8_t blend           = 255 * (uint16_t)gt / RAMP_SIZE;
-    if (cfg.channel_mode_args[channel_mode] & 0b01000000)
-        blend = 255 - blend;
-
-    calc_2ch_blend(&ch1_pwm, &ch2_pwm, brightness, top, blend);
-
-    return gradual_adjust(ch1_pwm, ch2_pwm);
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, gt);
+    return gradual_adjust(warm, cool);
 }
 
 
diff --git a/hwdef-noctigon-m44.h b/hwdef-noctigon-m44.h
index d02d8dd..2a9198a 100644
--- a/hwdef-noctigon-m44.h
+++ b/hwdef-noctigon-m44.h
@@ -63,34 +63,41 @@ enum channel_modes_e {
 #define USE_CALC_2CH_BLEND
 
 
-#define PWM_CHANNELS 1  // old, remove this
+#define PWM_CHANNELS  1  // old, remove this
 
-#define PWM_BITS 16     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
+#define PWM_BITS      16     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
 #define PWM_GET       PWM_GET16
 #define PWM_DATATYPE  uint16_t
 #define PWM_DATATYPE2 uint32_t  // only needs 32-bit if ramp values go over 255
-#define PWM1_DATATYPE uint16_t  // regular ramp table
+#define PWM1_DATATYPE uint16_t  // 15-bit PWM+DSM ramp
 //#define PWM2_DATATYPE uint16_t  // max "200% power" ramp table
-//#define PWM3_DATATYPE uint16_t  // PWM_TOPs for 2nd ramp table
 
 // PWM parameters of both channels are tied together because they share a counter
+// dynamic PWM
 #define PWM_TOP       ICR1   // holds the TOP value for for variable-resolution PWM
-#define PWM_TOP_INIT  511
-#define PWM_CNT       TCNT1  // for dynamic PWM, reset phase
-
-#define CH1_PIN  PB3            // pin 16, Opamp reference
-#define CH1_PWM  OCR1A          // OCR1A is the output compare register for PB3
+#define PWM_TOP_INIT  255
+#define PWM_CNT       TCNT1  // for checking / resetting phase
+// (max is (255 << 7), because it's 8-bit PWM plus 7 bits of DSM)
+#define DSM_TOP       (255<<7) // 15-bit resolution leaves 1 bit for carry
+
+// 1st channel (8 LEDs)
+uint16_t ch1_dsm_lvl;
+uint8_t ch1_pwm, ch1_dsm;
+#define CH1_PIN          PB3    // pin 16, Opamp reference
+#define CH1_PWM          OCR1A  // OCR1A is the output compare register for PB3
 #define CH1_ENABLE_PIN   PB0    // pin 19, Opamp power
 #define CH1_ENABLE_PORT  PORTB  // control port for PB0
 
-#define CH2_PIN  PA6            // pin 1, 2nd LED Opamp reference
-#define CH2_PWM  OCR1B          // OCR1B is the output compare register for PA6
+// 2nd channel (8 LEDs)
+uint16_t ch2_dsm_lvl;
+uint8_t ch2_pwm, ch2_dsm;
+#define CH2_PIN          PA6    // pin 1, 2nd LED Opamp reference
+#define CH2_PWM          OCR1B  // OCR1B is the output compare register for PA6
 #define CH2_ENABLE_PIN   PA0    // pin 7, Opamp power
 #define CH2_ENABLE_PORT  PORTA  // control port for PA0
 
 
 // e-switch
-#ifndef SWITCH_PIN
 #define SWITCH_PIN   PA7     // pin 20
 #define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
 #define SWITCH_PCIE  PCIE0   // PCIE1 is for PCINT[7:0]
@@ -98,7 +105,6 @@ enum channel_modes_e {
 #define SWITCH_PORT  PINA    // PINA or PINB or PINC
 #define SWITCH_PUE   PUEA    // pullup group A
 #define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
-#endif
 
 #define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
 #define VOLTAGE_PIN PB1      // Pin 18 / PB1 / ADC6
@@ -161,7 +167,7 @@ inline void hwdef_setup() {
     // configure PWM
     // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
     // pre-scale for timer: N = 1
-    // Linear opamp PWM for both main and 2nd LEDs (10-bit)
+    // PWM for both channels
     // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
     // WGM1[3:0]: 1,1,1,0: PWM, Fast, adjustable (DS table 12-5)
     // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
@@ -172,17 +178,22 @@ inline void hwdef_setup() {
             | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
             ;
     TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
-            | (1<<WGM13)  | (1<<WGM12)  // fast adjustable PWM (DS table 12-5)
-            //| (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
+            //| (1<<WGM13)  | (1<<WGM12)  // fast adjustable PWM (DS table 12-5)
+            | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
             ;
 
     // set PWM resolution
     PWM_TOP = PWM_TOP_INIT;
 
+    // set up interrupt for delta-sigma modulation
+    // (moved to hwdef.c functions so it can be enabled/disabled based on ramp level)
+    //TIMSK |= (1<<TOIE1);  // interrupt once for each timer 1 cycle
+
     // set up e-switch
     SWITCH_PUE = (1 << SWITCH_PIN);  // pull-up for e-switch
     SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
 }
 
+
 #define LAYOUT_DEFINED
 
diff --git a/spaghetti-monster/anduril/cfg-emisar-d4k-3ch.h b/spaghetti-monster/anduril/cfg-emisar-d4k-3ch.h
index 1e852a7..c39ac01 100644
--- a/spaghetti-monster/anduril/cfg-emisar-d4k-3ch.h
+++ b/spaghetti-monster/anduril/cfg-emisar-d4k-3ch.h
@@ -56,8 +56,8 @@
 #define MAX_1x7135 70
 // always run at 1/4th speed, because 4 kHz PWM is enough for this circuit
 // and speed changes make a big visible bump
-#define HALFSPEED_LEVEL 255
-#define QUARTERSPEED_LEVEL 255
+#define HALFSPEED_LEVEL     255
+#define QUARTERSPEED_LEVEL  255
 
 #define RAMP_SMOOTH_FLOOR 1
 #define RAMP_SMOOTH_CEIL  130
diff --git a/spaghetti-monster/anduril/cfg-noctigon-m44.h b/spaghetti-monster/anduril/cfg-noctigon-m44.h
index 127bd31..88bf628 100644
--- a/spaghetti-monster/anduril/cfg-noctigon-m44.h
+++ b/spaghetti-monster/anduril/cfg-noctigon-m44.h
@@ -33,10 +33,13 @@
 //#define CONFIG_BLINK_CHANNEL           CM_BOTH
 
 // blink numbers on the main LEDs by default (but allow user to change it)
-#define DEFAULT_BLINK_CHANNEL  CM_BLEND
+#define DEFAULT_BLINK_CHANNEL  CM_BOTH
 
 #define POLICE_COLOR_STROBE_CH1        CM_CH1
 #define POLICE_COLOR_STROBE_CH2        CM_CH2
+// aux red + aux blue are the correct colors, but are dim
+//#define POLICE_COLOR_STROBE_CH1        CM_AUXRED
+//#define POLICE_COLOR_STROBE_CH2        CM_AUXBLU
 
 // how much to increase total brightness at middle tint
 // (0 = 100% brightness, 64 = 200% brightness)
@@ -47,6 +50,7 @@
 // channel 2
 //   output: unknown, 6000 lm?
 #define RAMP_SIZE 150
+#if 0  // optimized hand-tweaked ramp from before PWM+DSM update
 // "100% power" ramp
 // level_calc.py 5.01 1 150 7135 0 2.0 5000 --pwm dyn:64:16384:511:5
 // (with manual tweaks)
@@ -59,46 +63,59 @@
 // level_calc.py 6.44 1 150 7135 1 0.2 2000 --pwm dyn:74:16383:1022
 //#define PWM2_LEVELS 2,2,2,3,3,4,4,5,6,7,8,9,10,11,13,14,16,17,19,21,23,25,28,30,33,35,38,41,44,47,50,54,57,60,64,67,71,74,78,81,84,88,91,94,97,99,101,103,105,106,107,107,107,106,105,102,99,95,90,84,77,68,58,47,34,36,38,40,42,44,47,49,52,54,57,60,63,66,69,73,76,80,83,87,91,96,100,104,109,114,119,124,130,135,141,147,153,160,166,173,180,187,195,203,211,219,228,236,245,255,264,274,285,295,306,317,329,340,353,365,378,391,405,419,433,448,463,479,495,511,530,550,570,591,612,634,657,680,705,730,755,782,809,837,865,895,925,957,989,1022
 //#define PWM3_LEVELS 16383,13234,9781,13826,9593,13434,9973,12021,12900,13193,13150,12899,12508,12023,12666,11982,12181,11422,11393,11247,11018,10731,10826,10434,10365,9927,9767,9565,9332,9076,8806,8693,8395,8096,7928,7626,7439,7143,6948,6665,6393,6203,5946,5700,5465,5187,4926,4681,4451,4195,3957,3700,3463,3213,2983,2718,2476,2231,1986,1742,1501,1245,997,756,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511,511
+#define MIN_THERM_STEPDOWN 65  // should be above highest dyn_pwm level
 #define DEFAULT_LEVEL 70
 #define MAX_1x7135 150
 #define HALFSPEED_LEVEL 10
 #define QUARTERSPEED_LEVEL 2
+#endif  // end old ramp config
+
+// delta-sigma modulated PWM (0b0HHHHHHHHLLLLLLL = 0, 8xHigh, 7xLow bits)
+// level_calc.py 5.01 1 150 7135 0 0.2 2000 --pwm 32640
+// (max is (255 << 7), because it's 8-bit PWM plus 7 bits of DSM)
+#define PWM1_LEVELS 0,1,2,3,4,5,6,7,9,10,12,14,17,19,22,25,28,32,36,41,45,50,56,62,69,76,84,92,101,110,121,132,143,156,169,184,199,215,232,251,270,291,313,336,360,386,414,442,473,505,539,574,612,651,693,736,782,829,880,932,987,1045,1105,1168,1233,1302,1374,1449,1527,1608,1693,1781,1873,1969,2068,2172,2279,2391,2507,2628,2753,2883,3018,3158,3303,3454,3609,3771,3938,4111,4289,4475,4666,4864,5068,5280,5498,5724,5957,6197,6445,6701,6965,7237,7518,7808,8106,8413,8730,9056,9392,9737,10093,10459,10835,11223,11621,12031,12452,12884,13329,13786,14255,14737,15232,15741,16262,16798,17347,17911,18489,19082,19691,20314,20954,21609,22281,22969,23674,24397,25137,25895,26671,27465,28279,29111,29963,30835,31727,32640
+
+#define MIN_THERM_STEPDOWN 50
+#define DEFAULT_LEVEL 70
+#define MAX_1x7135 150
+// always run at 1/4th speed, because 4 kHz PWM is enough for this circuit
+// and speed changes make a big visible bump
+#define HALFSPEED_LEVEL     255
+#define QUARTERSPEED_LEVEL  255
 
 #define RAMP_SMOOTH_FLOOR 1
 #define RAMP_SMOOTH_CEIL  130
-// 10, 30, 50, [70], 90, 110, [130]
+// 10, 30, 50, [70], 90, 110, 130
 #define RAMP_DISCRETE_FLOOR 10
 #define RAMP_DISCRETE_CEIL  RAMP_SMOOTH_CEIL
 #define RAMP_DISCRETE_STEPS 7
 
-// safe limit highest regulated power (no FET or turbo)
+// 10 40 [70] 100 130
 #define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
 #define SIMPLE_UI_CEIL RAMP_DISCRETE_CEIL
 #define SIMPLE_UI_STEPS 5
 
-// Allow 3C (or 6C) in Simple UI (toggle smooth or stepped ramping)
-#define USE_SIMPLE_UI_RAMPING_TOGGLE
-
-// allow Aux Config and Strobe Modes in Simple UI
-#define USE_EXTENDED_SIMPLE_UI
-
 // stop panicking at ~???? lm
 #define THERM_FASTER_LEVEL 130
-#define MIN_THERM_STEPDOWN 65  // should be above highest dyn_pwm level
-
-// enable 2 click turbo (Anduril 1 style)
-#define DEFAULT_2C_STYLE 1
 
 #define USE_POLICE_COLOR_STROBE_MODE
+#undef  TACTICAL_LEVELS
+#define TACTICAL_LEVELS 120,30,(RAMP_SIZE+3)  // high, low, police strobe
 
 // use the brightest setting for strobe
 #define STROBE_BRIGHTNESS MAX_LEVEL
-// slow down party strobe; this driver takes ~15ms to start making any light
-#define PARTY_STROBE_ONTIME 16
+// slow down party strobe; this driver takes a while to start making any light
+#define PARTY_STROBE_ONTIME  12
+//#define STROBE_OFF_LEVEL 1  // nope, this makes strobe blurry
+// bike strobe needs a longer pulse too?  nope
+#define BIKE_STROBE_ONTIME 8
 
-//// the default of 26 looks a bit flat, so increase it
+// the default of 26 looks a bit flat, so increase it
 #define CANDLE_AMPLITUDE 33
 
+// party strobe, tac strobe, police, lightning, candle, bike
+#define DEFAULT_STROBE_CHANNELS  CM_BOTH,CM_BOTH,CM_BOTH,CM_AUTO,CM_AUTO,CM_AUTO
+
 // the power regulator is a bit slow, so push it harder for a quick response from off
 //#define DEFAULT_JUMP_START_LEVEL 50
 //#define JUMP_START_TIME 50
@@ -107,6 +124,7 @@
 
 #define THERM_CAL_OFFSET 5
 
+// don't blink while ramping
 #ifdef BLINK_AT_RAMP_MIDDLE
 #undef BLINK_AT_RAMP_MIDDLE
 #endif