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| author | Selene ToyKeeper | 2019-08-26 14:53:28 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2019-08-26 14:53:28 -0600 |
| commit | 3375a579a93f3fa5cdd025bb8c76ab06efaca6e3 (patch) | |
| tree | c4624016cf2efef3f1901ef87a7ee1af2aa8fd82 | |
| parent | merged fsm to trunk... lots of updates: (diff) | |
| parent | fixed attiny13 builds (diff) | |
| download | anduril-3375a579a93f3fa5cdd025bb8c76ab06efaca6e3.tar.gz anduril-3375a579a93f3fa5cdd025bb8c76ab06efaca6e3.tar.bz2 anduril-3375a579a93f3fa5cdd025bb8c76ab06efaca6e3.zip | |
fixed attiny13 builds
| -rw-r--r-- | tk-attiny.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tk-attiny.h b/tk-attiny.h index 947a87c..597af4d 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -108,7 +108,9 @@ #error Hey, you need to define an I/O pin layout. #endif -#if (ATTINY==25) || (ATTINY==45) || (ATTINY==85) +#if (ATTINY==13) + // no changes needed +#elif (ATTINY==25) || (ATTINY==45) || (ATTINY==85) // use clock_prescale_set(n) instead; it's safer //#define CLOCK_DIVIDER_SET(n) {CLKPR = 1<<CLKPCE; CLKPR = n;} #elif (ATTINY==1634) |