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authorSelene ToyKeeper2023-11-30 09:19:45 -0700
committerSelene ToyKeeper2023-11-30 09:19:45 -0700
commitf745e12c3bc48d8fe544893871191086cf3cccc9 (patch)
tree0e7f6c2c5f362719ac4efad9d5c2365f3ed3c159 /arch/mcu.h
parentadded md5sum to build-all.sh output per target (diff)
parenteliminated direct CCP register access from arch/attiny1616 (diff)
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Merge branch 'avr32dd20-devkit' into trunk
Added support for AVR DD MCUs, particularly avr32dd20. Also did a bunch of refactoring for how MCU support works, cleaned up the ADC code, switched to consistent internal formats for voltage and temperature, fixed the FW3X, and some other little things. * avr32dd20-devkit: (28 commits) eliminated direct CCP register access from arch/attiny1616 made the avr32dd20 flashing script more universal added a build target for FW3X with manually-fixed RGB aux wiring prevent future issues like the FW3X had fixed FW3X thermal regulation fixed incorrect temperature history for a few seconds after waking fsm/adc: removed dead code FW3X: fixed external temperature sensor FW3X: multiple upgrades... fw3x: fixed swapped red+blue, fixed battery measurements, added police color strobe fixed ADC on sp10-pro fixed ADC on attiny85 and related builds fixed ADC on attiny1634 and related builds more ADC / DAC / MCU progress... avr32dd20-devkit: make the defaults a bit more dev friendly (realtime voltage colors, and no simple UI by default) ADC voltage: battcheck 3 digits, fixed t1616, switched back to 8-bit internal volt unit got ADC voltage+temp working on avrdd... but broke all other builds/MCUs 1.55V AA battery should not show as "white" voltage color, only purple started refactoring fsm/adc.*, but need a checkpoint before continuing added dac-scale.py: short script to calculate avrdd DAC+Vref values from level_calc.py ramp data ...
Diffstat (limited to 'arch/mcu.h')
-rw-r--r--arch/mcu.h147
1 files changed, 11 insertions, 136 deletions
diff --git a/arch/mcu.h b/arch/mcu.h
index 3b2b974..2080ea9 100644
--- a/arch/mcu.h
+++ b/arch/mcu.h
@@ -5,145 +5,20 @@
// This helps abstract away the differences between various attiny MCUs.
-// auto-detect eeprom size from avr-libc headers
-#ifndef EEPROM_SIZE
- #ifdef E2SIZE
- #define EEPROM_SIZE E2SIZE
- #elif defined(E2END)
- #define EEPROM_SIZE (E2END+1)
- #endif
-#endif
-
-/******************** hardware-specific values **************************/
-#if (ATTINY == 13)
- #define F_CPU 4800000UL
- #define V_REF REFS0
- #define BOGOMIPS 950
- #define ADMUX_VCC 0b00001100
- #define DELAY_ZERO_TIME 252
- #define SWITCH_PORT PINB // PINA or PINB or PINC
- #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
-#elif (ATTINY == 25)
- // TODO: Use 6.4 MHz instead of 8 MHz?
- #define F_CPU 8000000UL
- #define V_REF REFS1
- #define BOGOMIPS (F_CPU/4000)
- #define ADMUX_VCC 0b00001100
- #define ADMUX_THERM 0b10001111
- #define DELAY_ZERO_TIME 1020
- #define SWITCH_PORT PINB // PINA or PINB or PINC
- #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
-#elif (ATTINY == 85)
- // TODO: Use 6.4 MHz instead of 8 MHz?
- #define F_CPU 8000000UL
- #define V_REF REFS1
- #define BOGOMIPS (F_CPU/4000)
- // (1 << V_REF) | (0 << ADLAR) | (VCC_CHANNEL)
- #define ADMUX_VCC 0b00001100
- // (1 << V_REF) | (0 << ADLAR) | (THERM_CHANNEL)
- #define ADMUX_THERM 0b10001111
- #define DELAY_ZERO_TIME 1020
- #define SWITCH_PORT PINB // PINA or PINB or PINC
- #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
-#elif (ATTINY == 1634)
- #define F_CPU 8000000UL
- #define V_REF REFS1
- #define BOGOMIPS (F_CPU/4000)
- // DS table 19-3, 19-4, 1.1V ref / VCC
- #define ADMUX_VCC 0b00001101
- // (1 << V_REF) | (THERM_CHANNEL)
- // DS table 19-3, 19-4, internal sensor / 1.1V ref
- #define ADMUX_THERM 0b10001110
- #define DELAY_ZERO_TIME 1020
- //#define SWITCH_PORT PINA // set this in hwdef
- //#define VOLTAGE_ADC_DIDR DIDR0 // set this in hwdef
-#elif (ATTINY == 412) || (ATTINY == 416) || (ATTINY == 417) || (ATTINY == 816) || (ATTINY == 817) || (ATTINY == 1616) || (ATTINY == 1617) || (ATTINY == 3216) || (ATTINY == 3217)
- #define AVRXMEGA3
- #define F_CPU 10000000UL
- #define BOGOMIPS (F_CPU/4700)
- #define DELAY_ZERO_TIME 1020
-#else
- #error Hey, you need to define ATTINY.
-#endif
-
-
+#include <avr/eeprom.h>
#include <avr/interrupt.h>
+#include <avr/io.h>
+#include <avr/power.h>
+#include <avr/sleep.h>
+#include <avr/wdt.h>
-/******************** I/O pin and register layout ************************/
-#ifdef HWDEFFILE
-#include "fsm/tk.h"
-#include incfile(HWDEFFILE)
-#endif
-
-#if 0 // placeholder
-
-#elif defined(NANJG_LAYOUT)
-#include "hwdef-nanjg.h"
-#elif defined(FET_7135_LAYOUT)
-#include "hwdef-FET_7135.h"
+// for consistency, ROM_SIZE + EEPROM_SIZE
+#define ROM_SIZE PROGMEM_SIZE
-#elif defined(TRIPLEDOWN_LAYOUT)
-#include "hwdef-Tripledown.h"
-
-#elif defined(FERRERO_ROCHER_LAYOUT)
-#include "hwdef-Ferrero_Rocher.h"
-
-#endif // no more recognized driver types
-
-#ifndef LAYOUT_DEFINED
-#error Hey, you need to define an I/O pin layout.
-#endif
-
-#if (ATTINY==13)
- // no changes needed
-#elif (ATTINY==25) || (ATTINY==45) || (ATTINY==85)
- // use clock_prescale_set(n) instead; it's safer
- //#define CLOCK_DIVIDER_SET(n) {CLKPR = 1<<CLKPCE; CLKPR = n;}
-#elif (ATTINY==1634)
- // make it a NOP for now
- // FIXME
- //#define clock_prescale_set(x) ((void)0)
- //#define clock_prescale_set(n) {cli(); CCP = 0xD8; CLKPR = n; sei();}
- //#define clock_prescale_set(n) {cli(); CCP = 0xD8; CLKPR = n; sei();}
- inline void clock_prescale_set(uint8_t n) {cli(); CCP = 0xD8; CLKPR = n; sei();}
- typedef enum
- {
- clock_div_1 = 0,
- clock_div_2 = 1,
- clock_div_4 = 2,
- clock_div_8 = 3,
- clock_div_16 = 4,
- clock_div_32 = 5,
- clock_div_64 = 6,
- clock_div_128 = 7,
- clock_div_256 = 8
- } clock_div_t;
+#include "fsm/tk.h"
-#elif defined(AVRXMEGA3) // ATTINY816, 817, etc
- // this should work, but needs further validation
- inline void clock_prescale_set(uint8_t n) {
- cli();
- CCP = CCP_IOREG_gc; // temporarily disable clock change protection
- CLKCTRL.MCLKCTRLB = n; // Set the prescaler
- while (CLKCTRL.MCLKSTATUS & CLKCTRL_SOSC_bm) {} // wait for clock change to finish
- sei();
- }
- typedef enum
- {
- // Actual clock is 20 MHz, but assume that 10 MHz is the top speed and work from there
- // TODO: measure PWM speed and power use at 1.25/2.5/5/10 MHz, to determine which speeds are optimal
- clock_div_1 = (CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm), // 10 MHz
- clock_div_2 = (CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm), // 5 MHz
- clock_div_4 = (CLKCTRL_PDIV_8X_gc | CLKCTRL_PEN_bm), // 2.5 MHz
- clock_div_8 = (CLKCTRL_PDIV_16X_gc | CLKCTRL_PEN_bm), // 1.25 MHz
- clock_div_16 = (CLKCTRL_PDIV_32X_gc | CLKCTRL_PEN_bm), // 625 kHz
- clock_div_32 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz, max without changing to the 32 kHz ULP
- clock_div_64 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz
- clock_div_128 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz
- clock_div_256 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm) // 312 kHz
- } clock_div_t;
-#else
-#error Unable to define MCU macros.
-#endif
+#define MCU_H arch/MCUNAME.h
+#define MCU_C arch/MCUNAME.c
+#include incfile(MCU_H)