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| author | Selene ToyKeeper | 2019-09-28 23:14:16 -0600 |
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| committer | Selene ToyKeeper | 2019-09-28 23:14:16 -0600 |
| commit | 0df827391ced9bb0b7114248c78b696de4676b25 (patch) | |
| tree | d6e57c1ee063c0f7bd9186b80cc6a4fd889c2514 /bin/level_calc.py | |
| parent | un-hardcoded 255 as the highest PWM level, and used a "PWM_TOP" value instead (diff) | |
| download | anduril-0df827391ced9bb0b7114248c78b696de4676b25.tar.gz anduril-0df827391ced9bb0b7114248c78b696de4676b25.tar.bz2 anduril-0df827391ced9bb0b7114248c78b696de4676b25.zip | |
remapped D1S V2 pins to match new driver
(and changed a bit about how ADC / DIDR definitions work, since this now uses DIDR1 instead of DIDR0)
Diffstat (limited to '')
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