reorganized project files (part 1)

(just moved files, didn't change the contents yet,
 and nothing will work without updating #includes and build scripts and stuff)

12 files changed, 846 insertions, 0 deletions

diff --git a/hw/lumintop/blf-gt-mini/cfg.h b/hw/lumintop/blf-gt-mini/cfg.h
new file mode 100644
index 0000000..083f18e
--- /dev/null
+++ b/hw/lumintop/blf-gt-mini/cfg.h
@@ -0,0 +1,25 @@
+// BLF/Lumintop GT Mini config options for Anduril
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#include "hwdef-blf-gt-mini.h"
+// Same as an Emisar D1S, except it has a lighted button
+#include "cfg-emisar-d1s.h"
+#undef MODEL_NUMBER
+#define MODEL_NUMBER "0322"
+
+// the button lights up
+#define USE_INDICATOR_LED
+// the button is visible while main LEDs are on
+#define USE_INDICATOR_LED_WHILE_RAMPING
+
+// too big, remove stuff to make room
+#undef USE_TACTICAL_MODE
+#undef USE_SOS_MODE
+//#undef USE_RAMP_AFTER_MOON_CONFIG
+//#undef USE_RAMP_SPEED_CONFIG
+//#undef USE_VOLTAGE_CORRECTION
+//#undef USE_2C_STYLE_CONFIG
+//#undef USE_TACTICAL_STROBE_MODE
+
diff --git a/hw/lumintop/blf-gt-mini/hwdef.h b/hw/lumintop/blf-gt-mini/hwdef.h
new file mode 100644
index 0000000..f4a4d7b
--- /dev/null
+++ b/hw/lumintop/blf-gt-mini/hwdef.h
@@ -0,0 +1,14 @@
+// BLF/Lumintop GT Mini driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+// exactly the same as a D1S, but with a lighted button
+// (which is the same hwdef as a D4)
+#include "hwdef-emisar-d4.h"
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN   PB4    // pin 3
+#endif
+
diff --git a/hw/lumintop/blf-gt/cfg.h b/hw/lumintop/blf-gt/cfg.h
new file mode 100644
index 0000000..580318a
--- /dev/null
+++ b/hw/lumintop/blf-gt/cfg.h
@@ -0,0 +1,62 @@
+// BLF GT config options for Anduril
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#define MODEL_NUMBER "0321"
+#include "hwdef-blf-gt.h"
+// ATTINY: 85
+
+// the button lights up
+#define USE_INDICATOR_LED
+// the button is visible while main LEDs are on
+#define USE_INDICATOR_LED_WHILE_RAMPING
+
+#define RAMP_SIZE 150
+
+// First 60 values: level_calc.py 1 60 7135 4 5.0 255
+// Remainder: all 255 (buck driver at 100% duty cycle)
+#define PWM1_LEVELS 4,5,6,6,7,8,9,11,12,13,15,16,18,19,21,23,25,27,30,32,34,37,40,43,46,49,52,55,59,63,66,70,75,79,83,88,93,98,103,108,114,119,125,131,137,144,150,157,164,171,179,186,194,202,210,219,228,236,246,255, \
+    255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+// First 60 values: all 25 (buck driver at 10% power)
+// Remainder: values 61-150 of level_calc.py 1 150 7135 1 3 3000
+#define PWM2_LEVELS 25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,25, \
+    26,27,28,29,30,31,32,33,35,36,37,38,40,41,42,44,45,47,48,50,51,53,54,56,58,59,61,63,65,67,69,70,72,74,76,79,81,83,85,87,89,92,94,96,99,101,104,106,109,112,114,117,120,123,125,128,131,134,137,140,143,147,150,153,156,160,163,167,170,174,177,181,184,188,192,196,200,204,208,212,216,220,224,228,233,237,241,246,250,255
+#define POWER_80PX 138  // 2.0 Amps out of maximum 2.5 Amps
+#define MAX_1x7135 60   // where it switches from PWM to current control
+#define DEFAULT_LEVEL 69  // nice
+#define HALFSPEED_LEVEL 17
+#define QUARTERSPEED_LEVEL 6
+
+// use 2.0 A as the ceiling, 2.5 A only for turbo
+// start both ramps at the bottom; even moon throws a long way on the GT
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL  POWER_80PX
+// 1 23 46 [69] 92 115 138
+#define RAMP_DISCRETE_FLOOR 1
+#define RAMP_DISCRETE_CEIL  POWER_80PX
+#define RAMP_DISCRETE_STEPS 7
+
+// GT can handle heat well, so don't limit simple mode
+#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
+#define SIMPLE_UI_CEIL RAMP_DISCRETE_CEIL
+#define SIMPLE_UI_STEPS 5
+
+// smoother, more wobbly candle
+#define CANDLE_AMPLITUDE 33
+
+// turbo (i.e. "giggles" mode), low, tactical strobe
+#define TACTICAL_LEVELS 150,30,(RAMP_SIZE+2)
+
+// stop panicking at 80% power, this light has plenty of thermal mass
+#define THERM_FASTER_LEVEL POWER_80PX  // throttle back faster when high
+
+// don't blink during ramp, it's irrelevant and annoying on this light
+#undef BLINK_AT_RAMP_CEIL
+#undef BLINK_AT_RAMP_MIDDLE
+#undef BLINK_AT_RAMP_FLOOR
+
+// too big, turn off extra features
+//#undef USE_TACTICAL_MODE
+#undef USE_SOS_MODE
+
diff --git a/hw/lumintop/blf-gt/hwdef.h b/hw/lumintop/blf-gt/hwdef.h
new file mode 100644
index 0000000..fdb0cb6
--- /dev/null
+++ b/hw/lumintop/blf-gt/hwdef.h
@@ -0,0 +1,102 @@
+// BLF GT driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ *           ----
+ *   Reset -|1  8|- VCC (unused)
+ * eswitch -|2  7|- Voltage divider
+ * AUX LED -|3  6|- Current control (buck level)
+ *     GND -|4  5|- PWM (buck output on/off)
+ *           ----
+ *
+ * On high modes, the buck regulator's current level is adjusted by pin 6.
+ * On low modes, the buck is set to ~10% power
+ * and its output gets PWM'd by pin 5.
+ */
+
+#define ATTINY 85
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-emisar-d4.c
+
+// channel modes
+// * 0. main LEDs
+#define NUM_CHANNEL_MODES   1
+enum CHANNEL_MODES {
+    CM_MAIN = 0,
+};
+
+#define DEFAULT_CHANNEL_MODE  CM_MAIN
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b00000001
+
+
+#define PWM_CHANNELS 2  // old, remove this
+
+#define PWM_BITS      8       // attiny85 only supports up to 8 bits
+#define PWM_GET       PWM_GET8
+#define PWM_DATATYPE  uint8_t
+#define PWM_DATATYPE2 uint16_t
+#define PWM1_DATATYPE uint8_t   // low modes (PWM with buck at 10% power)
+#define PWM2_DATATYPE uint8_t   // high modes (adjustable constant current)
+
+#define PWM_TOP_INIT  255    // highest value used in top half of ramp
+
+// low modes (PWM turns regulator on/off)
+#define CH1_PIN  PB0        // pin 5
+#define CH1_PWM  OCR0A      // OCR0A is the output compare register for PB0
+
+// high modes (control voltage sets regulator's level)
+#define CH2_PIN  PB1        // pin 6
+#define CH2_PWM  OCR0B      // OCR0B is the output compare register for PB1
+
+#define AUXLED_PIN   PB4    // pin 3
+
+// e-switch
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+// VCC is regulated, so measure battery on pin 7 instead
+#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC
+#define VOLTAGE_PIN PB2     // pin 7, voltage ADC
+#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define VOLTAGE_ADC ADC1D  // Digital input disable bit corresponding with PB2
+// inherited from tk-attiny.h
+//#define VOLTAGE_ADC_DIDR DIDR0  // DIDR for ADC1
+// 1.1V reference, left-adjust, ADC1/PB2
+//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
+// 1.1V reference, no left-adjust, ADC1/PB2
+#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
+#define ADC_PRSCL   0x07    // clk/128
+
+// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
+#ifndef ADC_44
+#define ADC_44 (184*4)
+#endif
+#ifndef ADC_22
+#define ADC_22 (92*4)
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+
+inline void hwdef_setup() {
+    // configure PWM channels
+    DDRB = (1 << CH1_PIN)
+         | (1 << CH2_PIN);
+
+    TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...)
+    TCCR0A = PHASE;
+
+    // configure e-switch
+    PORTB = (1 << SWITCH_PIN);  // e-switch is the only input
+    PCMSK = (1 << SWITCH_PIN);  // pin change interrupt uses this pin
+}
+
+
+#define LAYOUT_DEFINED
+
diff --git a/hw/lumintop/fw3a-219/cfg.h b/hw/lumintop/fw3a-219/cfg.h
new file mode 100644
index 0000000..0bd5250
--- /dev/null
+++ b/hw/lumintop/fw3a-219/cfg.h
@@ -0,0 +1,16 @@
+// FW3A-219 config options for Anduril
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#include "cfg-fw3a.h"
+#undef MODEL_NUMBER
+#define MODEL_NUMBER "0312"
+
+#undef PWM1_LEVELS
+#undef PWM2_LEVELS
+#undef PWM3_LEVELS
+#define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,4,6,8,10,13,15,17,19,22,24,26,29,31,34,37,39,42,45,48,51,54,57,60,64,67,70,74,77,81,85,88,92,96,100,104,108,112,116,121,125,130,134,139,143,148,153,158,163,168,173,179,184,189,195,201,206,212,218,224,230,236,243,249,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+#define PWM3_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8,13,19,25,30,36,42,48,54,61,67,73,80,86,93,100,107,114,120,128
+
diff --git a/hw/lumintop/fw3a-nofet/cfg.h b/hw/lumintop/fw3a-nofet/cfg.h
new file mode 100644
index 0000000..b5d4166
--- /dev/null
+++ b/hw/lumintop/fw3a-nofet/cfg.h
@@ -0,0 +1,54 @@
+// FW3A with the FET disabled
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#include "cfg-fw3a.h"
+#undef MODEL_NUMBER
+#define MODEL_NUMBER "0313"
+
+// don't use channel 3 (FET)
+#undef PWM_CHANNELS
+#undef CH3_PIN
+#undef CH3_PWM
+#define PWM_CHANNELS 2
+
+// reconfigure the ramp
+#undef PWM1_LEVELS
+#undef PWM2_LEVELS
+#undef PWM3_LEVELS
+// copied from Emisar D4, mostly
+#define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,4,5,7,8,9,11,12,14,15,17,19,20,22,24,25,27,29,31,33,35,37,39,41,43,45,48,50,52,55,57,59,62,64,67,70,72,75,78,81,84,87,90,93,96,99,102,105,109,112,115,119,122,126,129,133,137,141,144,148,152,156,160,165,169,173,177,182,186,191,195,200,205,209,214,219,224,229,234,239,244,250,255
+#undef MAX_1x7135
+#define MAX_1x7135 65
+#undef MAX_Nx7135
+#undef HALFSPEED_LEVEL
+#define HALFSPEED_LEVEL 15
+#undef QUARTERSPEED_LEVEL
+#define QUARTERSPEED_LEVEL 6
+
+#undef RAMP_SMOOTH_FLOOR
+#undef RAMP_SMOOTH_CEIL
+#undef RAMP_DISCRETE_FLOOR
+#undef RAMP_DISCRETE_CEIL
+#undef RAMP_DISCRETE_STEPS
+
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL  150
+// 10, 33, 56, 80, 103, 126, 150
+#define RAMP_DISCRETE_FLOOR 10
+#define RAMP_DISCRETE_CEIL  RAMP_SMOOTH_CEIL
+#define RAMP_DISCRETE_STEPS 7
+
+// safe limit ~25% power
+// 10 37 65 92 120
+#undef SIMPLE_UI_CEIL
+#define SIMPLE_UI_CEIL 120
+
+#undef THERM_FASTER_LEVEL
+#define THERM_FASTER_LEVEL 130
+
+// without the 3rd channel, extra features can fit
+#define USE_TACTICAL_MODE
+
diff --git a/hw/lumintop/fw3a/cfg.h b/hw/lumintop/fw3a/cfg.h
new file mode 100644
index 0000000..53c4135
--- /dev/null
+++ b/hw/lumintop/fw3a/cfg.h
@@ -0,0 +1,54 @@
+// FW3A config options for Anduril
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#define MODEL_NUMBER "0311"
+#include "hwdef-fw3a.h"
+
+#define RAMP_SIZE 150
+
+// ../../bin/level_calc.py 1 65 7135 1 0.8 150
+// ... mixed with this:
+// ../../../bin/level_calc.py 3 150 7135 1 0.33 150 7135 1 1 850 FET 1 10 1500
+#define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,4,6,8,10,13,15,17,19,22,24,26,29,31,34,37,39,42,45,48,51,54,57,60,64,67,70,74,77,81,85,88,92,96,100,104,108,112,116,121,125,130,134,139,143,148,153,158,163,168,173,179,184,189,195,201,206,212,218,224,230,236,243,249,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
+#define PWM3_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8,19,31,43,55,67,79,91,104,117,130,143,157,170,184,198,212,226,240,255
+
+#define DEFAULT_LEVEL       50
+#define MAX_1x7135          65
+#define MAX_Nx7135          130
+#define HALFSPEED_LEVEL     15
+#define QUARTERSPEED_LEVEL  6
+
+#define RAMP_SMOOTH_FLOOR  1
+#define RAMP_SMOOTH_CEIL   MAX_Nx7135
+// 10, 30, 50, [70], 90, 110, 130
+#define RAMP_DISCRETE_FLOOR  10
+#define RAMP_DISCRETE_CEIL   RAMP_SMOOTH_CEIL
+#define RAMP_DISCRETE_STEPS  7
+
+// safe limit ~20% power
+// 20 40 60 80 100
+#define SIMPLE_UI_FLOOR  20
+#define SIMPLE_UI_CEIL   100
+#define SIMPLE_UI_STEPS  5
+
+// stop panicking at about 3A or ~1100 lm, this light is a hotrod
+#define THERM_FASTER_LEVEL MAX_Nx7135
+
+// don't blink during ramp
+#define BLINK_AT_RAMP_CEIL
+#undef BLINK_AT_RAMP_MIDDLE
+#undef BLINK_AT_RAMP_FLOOR
+
+// enable extra features
+#define USE_SMOOTH_STEPS
+
+// can't reset the normal way because power is connected before the button
+#define USE_SOFT_FACTORY_RESET
+
+// too big, turn off extra features
+#undef USE_TACTICAL_MODE
+#undef USE_SOS_MODE
+
diff --git a/hw/lumintop/fw3a/hwdef.c b/hw/lumintop/fw3a/hwdef.c
new file mode 100644
index 0000000..b20969d
--- /dev/null
+++ b/hw/lumintop/fw3a/hwdef.c
@@ -0,0 +1,71 @@
+// BLF/TLF FW3A PWM helper functions
+// Copyright (C) 2019-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+void set_level_zero();
+
+void set_level_main(uint8_t level);
+bool gradual_tick_main(uint8_t gt);
+
+
+Channel channels[] = {
+    { // main LEDs
+        .set_level    = set_level_main,
+        .gradual_tick = gradual_tick_main
+    },
+};
+
+
+void set_level_zero() {
+    CH1_PWM = 0;
+    CH2_PWM = 0;
+    #ifdef CH3_PIN
+        CH3_PWM = 0;
+    #endif
+}
+
+// TODO: implement delta-sigma modulation for better low modes
+
+// single set of LEDs with 3 stacked power channels, FET+N+1
+// (or just use N+1 on the no-FET model or FET+1 model)
+void set_level_main(uint8_t level) {
+    PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+    PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+    #ifdef CH3_PIN
+        PWM_DATATYPE ch3_pwm = PWM_GET(pwm3_levels, level);
+    #endif
+
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+    #ifdef CH3_PIN
+        CH3_PWM = ch3_pwm;
+    #endif
+}
+
+bool gradual_tick_main(uint8_t gt) {
+    PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt);
+    #ifdef CH3_PIN
+        PWM_DATATYPE pwm3 = PWM_GET(pwm3_levels, gt);
+    #endif
+
+    GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT);
+    #ifdef CH3_PIN
+        GRADUAL_ADJUST_STACKED(pwm2, CH2_PWM, PWM_TOP_INIT);
+        GRADUAL_ADJUST_SIMPLE (pwm3, CH3_PWM);
+    #else
+        GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM);
+    #endif
+
+    if (   (pwm1 == CH1_PWM)
+        && (pwm2 == CH2_PWM)
+        #ifdef CH3_PIN
+            && (pwm3 == CH3_PWM)
+        #endif
+       ) {
+        return true;  // done
+    }
+    return false;  // not done yet
+}
+
diff --git a/hw/lumintop/fw3a/hwdef.h b/hw/lumintop/fw3a/hwdef.h
new file mode 100644
index 0000000..519fb97
--- /dev/null
+++ b/hw/lumintop/fw3a/hwdef.h
@@ -0,0 +1,105 @@
+// BLF/TLF FW3A driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ *           ----
+ *   Reset -|1  8|- VCC
+ * eswitch -|2  7|- optic nerve
+ *     FET -|3  6|- 7x7135
+ *     GND -|4  5|- 1x7135
+ *           ----
+ */
+
+#define ATTINY 85
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-fw3a.c
+
+// channel modes
+// * 0. FET+7+1 stacked
+#define NUM_CHANNEL_MODES   1
+enum CHANNEL_MODES {
+    CM_MAIN = 0,
+};
+
+#define DEFAULT_CHANNEL_MODE  CM_MAIN
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b00000001
+
+
+#define PWM_CHANNELS 3  // old, remove this
+
+#define PWM_BITS      8       // attiny85 only supports up to 8 bits
+#define PWM_GET       PWM_GET8
+#define PWM_DATATYPE  uint8_t
+#define PWM_DATATYPE2 uint16_t
+#define PWM1_DATATYPE uint8_t   // 1x7135 ramp
+#define PWM2_DATATYPE uint8_t   // 7x7135 ramp
+#define PWM3_DATATYPE uint8_t   // DD FET ramp
+
+#define PWM_TOP_INIT  255    // highest value used in top half of ramp
+
+// 1x7135 channel
+#define CH1_PIN  PB0        // pin 5, 1x7135 PWM
+#define CH1_PWM  OCR0A      // OCR0A is the output compare register for PB0
+
+// 7x7135 channel
+#define CH2_PIN  PB1        // pin 6, 7x7135 PWM
+#define CH2_PWM  OCR0B      // OCR0B is the output compare register for PB1
+
+// DD FET channel
+#define CH3_PIN  PB4        // pin 3, FET PWM
+#define CH3_PWM  OCR1B      // OCR1B is the output compare register for PB4
+
+// e-switch
+#ifndef SWITCH_PIN
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
+
+#ifndef VISION_PIN
+#define VISION_PIN PB2      // pin 7, optic nerve
+//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
+//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+#endif
+#define ADC_PRSCL   0x07    // clk/128
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+
+inline void hwdef_setup() {
+
+    // configure PWM channels
+    DDRB = (1 << CH1_PIN)
+         | (1 << CH2_PIN)
+         | (1 << CH3_PIN);
+
+    // configure PWM channels
+    TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...)
+    TCCR0A = PHASE;
+
+    // Second PWM counter is ... weird
+    TCCR1 = _BV (CS10);
+    GTCCR = _BV (COM1B1) | _BV (PWM1B);
+    OCR1C = PWM_TOP_INIT;  // Set ceiling value to maximum
+
+    // configure e-switch
+    PORTB = (1 << SWITCH_PIN);  // e-switch is the only input
+    PCMSK = (1 << SWITCH_PIN);  // pin change interrupt uses this pin
+
+    // TODO: set up the vision pin
+
+}
+
+
+#define LAYOUT_DEFINED
+
diff --git a/hw/lumintop/fw3x-lume1/cfg.h b/hw/lumintop/fw3x-lume1/cfg.h
new file mode 100644
index 0000000..184ab8e
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/cfg.h
@@ -0,0 +1,81 @@
+// lume1 for FW3x config options for Anduril
+// Copyright (C) 2020-2023 LoneOceans, Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ * Constant current Buck-Boost + FET driver
+ * For more information: www.loneoceans.com/labs/
+ * Datasheets:
+ * - 1634: http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8303-8-bit-AVR-Microcontroller-tinyAVR-ATtiny1634_Datasheet.pdf
+ * - 85: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2586-AVR-8-bit-Microcontroller-ATtiny25-ATtiny45-ATtiny85_Datasheet.pdf
+ */
+
+#define MODEL_NUMBER "0314"
+#include "hwdef-fw3x-lume1.h"
+// ATTINY: 1634
+
+// set this light for 50C thermal ceiling
+#undef DEFAULT_THERM_CEIL
+#define DEFAULT_THERM_CEIL 50
+
+// this light has three aux LED channels: R, G, B
+#define USE_AUX_RGB_LEDS
+
+// it has no independent LED in the button unlike emisar d4
+//#define USE_BUTTON_LED
+
+// the aux LEDs are front-facing, so turn them off while main LEDs are on
+#ifdef USE_INDICATOR_LED_WHILE_RAMPING
+#undef USE_INDICATOR_LED_WHILE_RAMPING
+#endif
+
+// ../../bin/level_calc.py cube 1 149 7135 0 0.5 1000, with 0 appended to the end.
+// for FET PWM (PWM2), all values are 0, except for last value of 1023
+// (with max_pwm set to 1023)
+#define RAMP_SIZE 150
+//#define PWM1_LEVELS 0,0,0,0,1,1,1,1,2,2,2,3,3,4,4,5,5,6,7,7,8,9,10,11,12,13,14,15,16,17,19,20,22,23,25,26,28,30,32,34,36,38,40,42,45,47,49,52,55,58,60,63,66,70,73,76,80,83,87,91,94,98,102,107,111,115,120,124,129,134,139,144,150,155,160,166,172,178,184,190,196,203,209,216,223,230,237,244,252,259,267,275,283,291,299,308,316,325,334,343,353,362,372,382,392,402,412,423,433,444,455,466,478,489,501,513,525,538,550,563,576,589,602,616,630,644,658,672,687,701,716,731,747,762,778,794,810,827,844,861,878,895,913,930,948,967,985,1004,1023,0
+#define PWM1_LEVELS 1,1,1,1,2,2,2,2,3,3,3,4,4,5,5,6,6,7,8,8,9,10,11,12,13,14,15,16,17,18,20,21,23,24,26,27,29,31,33,35,37,39,41,43,45,48,50,53,56,58,61,64,67,70,74,77,80,84,88,91,95,99,103,108,112,116,121,125,130,135,140,145,150,156,161,167,173,178,184,191,197,203,210,217,223,230,238,245,252,260,268,275,283,292,300,308,317,326,335,344,353,363,372,382,392,402,413,423,434,445,456,467,478,490,502,514,526,538,551,563,576,589,603,616,630,644,658,672,687,702,717,732,747,763,778,794,811,827,844,861,878,895,913,931,949,967,985,1004,1023,0
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1023
+#define DEFAULT_LEVEL 56
+#define MAX_1x7135 149
+// TODO: test if underclocking works on lume1
+//#define HALFSPEED_LEVEL 14
+//#define QUARTERSPEED_LEVEL 5
+// don't slow down at low levels; this isn't that sort of light
+// (it needs to stay at full speed for the 10-bit PWM to work)
+#ifdef USE_DYNAMIC_UNDERCLOCKING
+#undef USE_DYNAMIC_UNDERCLOCKING
+#endif
+
+// the entire ramp is regulated except turbo; don't blink halfway up
+#ifdef BLINK_AT_RAMP_MIDDLE
+#undef BLINK_AT_RAMP_MIDDLE
+#endif
+
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL 149
+// turn on BuckBoost from level 1 to 149, but not 150
+// Level 150 is when BuckBoost is off and FET is ON 100%
+#define LED_ENABLE_PIN_LEVEL_MIN 1
+#define LED_ENABLE_PIN_LEVEL_MAX 149
+// 10 33 56 79 102 125 [149]
+#define RAMP_DISCRETE_FLOOR 10
+#define RAMP_DISCRETE_CEIL RAMP_SMOOTH_CEIL
+#define RAMP_DISCRETE_STEPS 7
+
+#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
+#define SIMPLE_UI_CEIL 120
+#define SIMPLE_UI_STEPS 5
+
+// slow down party strobe; this driver can't pulse for too short a time
+#define PARTY_STROBE_ONTIME 4
+
+// stop panicking at ~85% regulated power or ~750 lm
+#define THERM_FASTER_LEVEL 140
+
+#define THERM_CAL_OFFSET 0  // not needed due to external sensor
+
+// can't reset the normal way because power is connected before the button
+#define USE_SOFT_FACTORY_RESET
+
diff --git a/hw/lumintop/fw3x-lume1/hwdef.c b/hw/lumintop/fw3x-lume1/hwdef.c
new file mode 100644
index 0000000..2f31ed0
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/hwdef.c
@@ -0,0 +1,60 @@
+// FW3X Lume1 PWM helper functions
+// Copyright (C) 2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#include "chan-rgbaux.c"
+
+void set_level_zero();
+
+void set_level_main(uint8_t level);
+bool gradual_tick_main(uint8_t gt);
+
+
+Channel channels[] = {
+    { // channel 1 only
+        .set_level    = set_level_main,
+        .gradual_tick = gradual_tick_main
+    },
+    RGB_AUX_CHANNELS
+};
+
+
+void set_level_zero() {
+    CH1_PWM = 0;
+    CH2_PWM = 0;
+    PWM_CNT = 0;  // reset phase
+    CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable regulator
+}
+
+// single set of LEDs with 2 stacked power channels, regulated + DD FET
+void set_level_main(uint8_t level) {
+    CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN);  // enable regulator
+
+    PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+    PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+
+    // force reset phase when turning on from zero
+    // (for faster, more consistent initial response)
+    if (! actual_level) PWM_CNT = 0;
+}
+
+bool gradual_tick_main(uint8_t gt) {
+    // 150/150 is full FET + zero regulated,
+    // 149/150 is zero FET + full regulated,
+    // so don't try to gradually adjust between
+    if ((RAMP_SIZE == actual_level) || (gt >= RAMP_SIZE-1)) {
+        set_level(gt + 1);
+        return true;
+    }
+
+    PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+    GRADUAL_ADJUST_SIMPLE(pwm1, CH1_PWM);
+
+    if (pwm1 == CH1_PWM) return true;  // done
+    return false;  // not done yet
+}
+
diff --git a/hw/lumintop/fw3x-lume1/hwdef.h b/hw/lumintop/fw3x-lume1/hwdef.h
new file mode 100644
index 0000000..c03248b
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/hwdef.h
@@ -0,0 +1,202 @@
+// lume1 Driver Rev B for FW3x driver layout (attiny1634)
+// Copyright (C) 2020-2023 LoneOceans, Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/* lume1 Driver Rev B for FW3x driver layout (attiny1634)
+ * www.loneoceans.com/labs/ for more information
+ *
+ * Pin / Name / Function in Lume1 Rev B
+ *   1    PA6   Regulated PWM (PWM1B)
+ *   2    PA5   R: red aux LED (PWM0B)
+ *   3    PA4   G: green aux LED
+ *   4    PA3   B: blue aux LED
+ *   5    PA2   e-switch (PCINT2)
+ *   6    PA1   Jumper 1
+ *   7    PA0   Jumper 2
+ *   8    GND   GND
+ *   9    VCC   VCC
+ *  10    PC5   Jumper 3
+ *  11    PC4   Jumper 4
+ *  12    PC3   RESET
+ *  13    PC2   External Thermal Sensor (ADC11)
+ *  14    PC1   SCK
+ *  15    PC0   N/C
+ *  16    PB3   FET PWM (PWM1A)
+ *  17    PB2   MISO
+ *  18    PB1   MOSI
+ *  19    PB0   ADC5 Voltage Battery Sense (2:1 divider)
+ *  20    PA7   BB_Enable
+ *        ADC12 internal thermal sensor (not used for lume1)
+ *
+ * Main LED power uses one pin as a global Buck Boost Enable, and
+ * one pin to control the power level via PWM.
+ * Another pin is used for DD FET control.
+ */
+
+#define ATTINY 1634
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-fw3x-lume1.c
+
+// allow using aux LEDs as extra channel modes
+#include "chan-rgbaux.h"
+
+// channel modes:
+// * 0. main LEDs
+// * 1+. aux RGB
+#define NUM_CHANNEL_MODES   (1 + NUM_RGB_AUX_CHANNEL_MODES)
+enum CHANNEL_MODES {
+    CM_MAIN = 0,
+    RGB_AUX_ENUMS
+};
+
+#define DEFAULT_CHANNEL_MODE  CM_MAIN
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b0000000000000001
+
+
+#define PWM_CHANNELS  2  // old, remove this
+
+// Added for Lume1 Buck Boost Driver
+#define PWM_BITS      16        // 0 to 1023 at 3.9 kHz, not 0 to 255 at 15.6 kHz
+#define PWM_GET       PWM_GET16
+#define PWM_DATATYPE  uint16_t
+#define PWM_DATATYPE2 uint32_t  // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint16_t  // regulated ramp
+#define PWM2_DATATYPE uint16_t  // DD FET ramp
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP       ICR1   // holds the TOP value for variable-resolution PWM
+#define PWM_TOP_INIT  1023
+#define PWM_CNT       TCNT1  // for dynamic PWM, reset phase
+
+// regulated channel
+#define CH1_PIN  PA6            // pin 1, Buck Boost CTRL pin or 7135-eqv PWM
+#define CH1_PWM  OCR1B          // OCR1B is the output compare register for PA6
+#define CH1_ENABLE_PIN   PA7    // pin 20, BuckBoost Enable
+#define CH1_ENABLE_PORT  PORTA  // control port for PA7
+
+// DD FET channel
+#define CH2_PIN  PB3            // pin 16, FET PWM Pin, but only used as on (1023) or off (0)
+#define CH2_PWM  OCR1A          // OCR1A is the output compare register for PB3
+
+/* // For Jumpers X1 to X4, no SW support yet
+#define JUMPER1_PIN PA1
+#define JUMPER2_PIN PA0
+#define JUMPER3_PIN PC5
+#define JUMPER4_PIN PC4
+*/
+
+// e-switch
+#define SWITCH_PIN   PA2    // pin 5
+#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt
+#define SWITCH_PCIE  PCIE0  // PCIE0 is for PCINT[7:0]
+#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0]
+#define SWITCH_PORT  PINA   // PINA or PINB or PINC
+#define SWITCH_PUE   PUEA   // pullup group A
+#define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
+
+#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
+#define VOLTAGE_PIN PB0      // Pin 19  PB0  ADC5
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC ADC5D  // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC5D
+// DS tables 19-3, 19-4
+// Bit   7     6     5      4     3    2    1    0
+//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
+// MUX[3:0] = 0, 1, 0, 1 for ADC5 / PB0
+// divided by ...
+// REFS[1:0] = 0, 0 for VCC as analog reference at 2.5V
+// other bits reserved
+#define ADMUX_VOLTAGE_DIVIDER 0b00000101
+#define ADC_PRSCL   0x06    // clk/64
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+// [(Vbatt)*(R2/(R2+R1)) / 2.5V] * 1023
+// R1 = R2 = 100kR
+#ifndef ADC_44
+#define ADC_44 900
+#endif
+#ifndef ADC_22
+#define ADC_22 450
+#endif
+
+// Default ADMUX_THERM for Temperature is: 0b10001110 in tk-attiny.h
+// REFS[1:0] as 10 for analog reference at internal 1.1Vref
+// MUX[3:0] as 1110 for ADC'12' - temperature sensor internal
+
+// Modified fsm-adc.c to use different ADMUX and ADC_temperature_handler()
+// based on USE_EXTERNAL_TEMP_SENSOR
+// See line 34 and line 209
+#define USE_EXTERNAL_TEMP_SENSOR
+#define ADMUX_THERM_EXTERNAL_SENSOR 0b00001011  // VCC reference (2.5V), Channel PC2
+// Used for Lume1 Driver: MCP9700 - T_Celsius = 100*(VOUT - 0.5V)
+// ADC is 2.5V reference, 0 to 1023
+// FIXME: due to floating point, this calculation takes 916 extra bytes
+//        (should use an integer equivalent instead)
+#define EXTERN_TEMP_FORMULA(m) (((m)-205)/4.09)
+
+// this driver allows for aux LEDs under the optic
+#define AUXLED_R_PIN    PA5    // pin 2
+#define AUXLED_G_PIN    PA4    // pin 3
+#define AUXLED_B_PIN    PA3    // pin 4
+#define AUXLED_RGB_PORT PORTA  // PORTA or PORTB or PORTC
+#define AUXLED_RGB_DDR  DDRA   // DDRA or DDRB or DDRC
+#define AUXLED_RGB_PUE  PUEA   // PUEA or PUEB or PUEC
+
+// For lume1 driver, no SW support for Auxillary Jumpers X1 to X4 yet!
+inline void hwdef_setup() {
+    // enable output ports
+    // FET PWM Pin
+    DDRB = (1 << CH2_PIN);
+    // Main PWM, Buck Boost Enable Pin, aux R/G/B
+    DDRA = (1 << CH1_PIN)
+         | (1 << CH1_ENABLE_PIN)
+         | (1 << AUXLED_R_PIN)
+         | (1 << AUXLED_G_PIN)
+         | (1 << AUXLED_B_PIN)
+         ;
+
+    //DDRB&=~(1<<VOLTAGE_PIN); // All pins are input by default
+    /* // For Jumpers X1 to X4, no SW support yet
+    DDRA &= (1<<JUMPER1_PIN);
+    DDRA &= (1<<JUMPER2_PIN);
+    DDRC &= (1<<JUMPER3_PIN);
+    DDRC &= (1<<JUMPER4_PIN);
+    PUEA = (1 << JUMPER1_PIN);
+    PUEA = (1 << JUMPER2_PIN);
+    PUEC = (1 << JUMPER3_PIN);
+    PUEC = (1 << JUMPER4_PIN);
+    */
+
+    // configure PWM for 10 bit at 3.9kHz
+    // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
+    // pre-scale for timer: N = 1
+    // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
+    // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
+    // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
+    // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
+    TCCR1A  = (1<<WGM11)  | (1<<WGM10)   // 10-bit (TOP=0x03FF) (DS table 12-5)
+            | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A Clear OC1A on Compare Match
+            | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B Clear OC1B on Compare Match
+            ;
+    TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
+            | (0<<WGM13)  | (0<<WGM12)  // PWM, Phase Correct, 10-bit
+            ;
+
+    // set PWM resolution
+    PWM_TOP = PWM_TOP_INIT;
+
+    // set up e-switch
+    SWITCH_PUE = (1 << SWITCH_PIN);  // pull-up for e-switch
+    SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
+}
+
+
+#define LAYOUT_DEFINED
+