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authorSelene ToyKeeper2022-04-09 02:46:15 -0600
committerSelene ToyKeeper2022-04-09 02:46:15 -0600
commit3a0f2bb9fa050bf9a0e8dd38cf32d316e1b18f56 (patch)
tree0bfc60c84622b2b23593a76e6dae2d94ad8078be /hw
parentk9.3 tint-toggle build is broken, generate a better fail error (until it's fi... (diff)
parentmerged anduril2 branch for upstream changes (diff)
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merged sofirn sp10-pro branch (should have done it months ago, but forgot)
Diffstat (limited to '')
-rw-r--r--hwdef-BLF_Q8-T1616.h14
-rw-r--r--hwdef-Sofirn_SP10-Pro.h (renamed from hwdef-Sofirn_SP10S.h)62
-rw-r--r--hwdef-gchart-fet1-t1616.h17
-rw-r--r--hwdef-thefreeman-lin16dac.h109
4 files changed, 160 insertions, 42 deletions
diff --git a/hwdef-BLF_Q8-T1616.h b/hwdef-BLF_Q8-T1616.h
index 2a0e6ff..d6ad760 100644
--- a/hwdef-BLF_Q8-T1616.h
+++ b/hwdef-BLF_Q8-T1616.h
@@ -61,8 +61,8 @@ Driver pinout:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = ...;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm; // Outputs: Aux LED and PWMs
@@ -91,8 +91,14 @@ inline void hwdef_setup() {
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
diff --git a/hwdef-Sofirn_SP10S.h b/hwdef-Sofirn_SP10-Pro.h
index 0ee3332..bb10f2f 100644
--- a/hwdef-Sofirn_SP10S.h
+++ b/hwdef-Sofirn_SP10-Pro.h
@@ -1,28 +1,14 @@
-#ifndef HWDEF_SOFIRN_SP10S_H
-#define HWDEF_SOFIRN_SP10S_H
+#ifndef HWDEF_SOFIRN_SP10_H
+#define HWDEF_SOFIRN_SP10_H
-// TODO: rename to sofirn-sp10s-gchart?
-
-/* gChart's PIC12 to ATTINY1616 v1 adapter for the SP10S
-https://oshpark.com/shared_projects/b4IZEGSy
-
-PIC12 Pinout:
-1 - VDD
-2 - No Connect
-3 - Low Channel FET (series 4.7K Ohms)
-4 - Switch
-5 - High Channel FET (main PWM)
-6 - Voltage Divider (300K:100K Ohms)
-7 - Boost chip enable
-8 - GND
+/* Sofirn SP10 Pro pinout
ATTINY1616 Mapping:
-2 - PA5 : (no connect)
-3 - PB5 : TCA0 - WO2 Alternate MUX
-4 - PB3 : (switch)
-5 - PB0 : TCA0 - WO0
-6 - PB4 : ADC0 - AIN9
-7 - PA1 : (boost enable)
+PB5 : PWM small channel (TCA0 - WO2 Alternate MUX)
+PB3 : eSwitch
+PB0 : PWM big channel (TCA0 - WO0)
+PB4 : Voltage divider (ADC0 - AIN9)
+PA1 : Boost Enable
*/
@@ -44,25 +30,33 @@ ATTINY1616 Mapping:
#endif
#define PWM_CHANNELS 2
+#define PWM_BITS 16 // data type needs 16 bits, not 8
+#define PWM_TOP 255 // highest value used in top half of ramp
+#define USE_DYN_PWM // dynamic frequency and speed
// Small channel
#ifndef PWM1_PIN
#define PWM1_PIN PB5
-#define PWM1_LVL TCA0.SINGLE.CMP2 // PB5 is Alternate MUX for TCA Compare 2
+#define PWM1_LVL TCA0.SINGLE.CMP2BUF // PB5 is Alternate MUX for TCA Compare 2
#endif
// Big channel
#ifndef PWM2_PIN
#define PWM2_PIN PB0
-#define PWM2_LVL TCA0.SINGLE.CMP0 // PB0 is TCA Compare 0
+#define PWM2_LVL TCA0.SINGLE.CMP0BUF // PB0 is TCA Compare 0
#endif
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM1_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM
+// not necessary when double-buffered "BUF" registers are used
+//#define PWM1_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment
+
#define LED_ENABLE_PIN PIN1_bp
#define LED_ENABLE_PORT PORTA_OUT
#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
#define DUAL_VOLTAGE_FLOOR 20 // for AA/14500 boost drivers, don't indicate low voltage if below this level
-#define DUAL_VOLTAGE_LOW_LOW 07 // the lower voltage range's danger zone 0.7 volts
+#define DUAL_VOLTAGE_LOW_LOW 7 // the lower voltage range's danger zone 0.7 volts (NiMH)
#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read
// Raw ADC readings at 4.4V and 2.2V
@@ -83,8 +77,8 @@ ATTINY1616 Mapping:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
VPORTA.DIR = PIN1_bm; // Boost enable pin
VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output
@@ -107,16 +101,22 @@ inline void hwdef_setup() {
//PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider
//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel
- //PORTC.PIN0CTRL = PORT_PULLUPEN_bm; connected to the ADC via airwire
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
- TCA0.SINGLE.PER = 255;
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
+ PWM1_TOP = PWM_TOP;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
diff --git a/hwdef-gchart-fet1-t1616.h b/hwdef-gchart-fet1-t1616.h
index 365ecd7..2435b99 100644
--- a/hwdef-gchart-fet1-t1616.h
+++ b/hwdef-gchart-fet1-t1616.h
@@ -60,8 +60,8 @@ Read voltage from VCC pin, has diode with ~0.4v drop
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = 0b00000010;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm;
@@ -90,11 +90,14 @@ inline void hwdef_setup() {
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
- // TODO: measure 5 MHz fast PWM vs 10 MHz phase-correct, to see if it
- // still has issues at 0/255 and 255/255 like older models did
- // (and maybe switch to phase-correct@10MHz)
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
diff --git a/hwdef-thefreeman-lin16dac.h b/hwdef-thefreeman-lin16dac.h
new file mode 100644
index 0000000..0999c4c
--- /dev/null
+++ b/hwdef-thefreeman-lin16dac.h
@@ -0,0 +1,109 @@
+#ifndef HWDEF_THEFREEMAN_LIN18_H
+#define HWDEF_THEFREEMAN_LIN18_H
+
+/* thefreeman's Linear 16 driver using DAC control
+
+PA6 - DAC for LED brightness control
+PA7 - Op-amp enable pin
+PB5 - Aux LED
+PB4 - Switch pin, internal pullup
+PB3 - HDR control, set High to enable the high power channel, set Low for low power
+Read voltage from VCC pin, has PFET so no drop
+
+*/
+
+
+#define LAYOUT_DEFINED
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define PWM_CHANNELS 1
+#define USE_DYN_PWM // dynamic frequency and speed
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN PIN4_bp
+#define SWITCH_PORT VPORTB.IN
+#define SWITCH_ISC_REG PORTB.PIN2CTRL
+#define SWITCH_VECT PORTB_PORT_vect
+#define SWITCH_INTFLG VPORTB.INTFLAGS
+#endif
+
+
+#define PWM1_LVL DAC0.DATA // use this for DAC voltage output
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM1_TOP VREF.CTRLA // holds the TOP value for for variable-resolution PWM
+
+// For enabling / disabling the HDR high-range channel
+#define LED_ENABLE_PIN PIN3_bp
+#define LED_ENABLE_PORT PORTB_OUT
+#define LED_ENABLE_PIN_LEVEL_MIN 35
+#define LED_ENABLE_PIN_LEVEL_MAX 150
+
+// For turning on and off the op-amp
+#define LED2_ENABLE_PIN PIN7_bp
+#define LED2_ENABLE_PORT PORTA_OUT
+
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 0 // using a PFET so no appreciable drop
+#endif
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN PIN5_bp
+#define AUXLED_PORT PORTB
+#endif
+
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ // TODO: for this DAC controlled-light, try to decrease the clock speed or use the ULP
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
+
+ VPORTA.DIR = PIN6_bm | PIN7_bm;
+ VPORTB.DIR = PIN3_bm;
+ //VPORTC.DIR = 0b00000000;
+
+ // enable pullups on the input pins to reduce power
+ PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
+ //PORTA.PIN6CTRL = PORT_PULLUPEN_bm; // DAC ouput
+ //PORTA.PIN7CTRL = PORT_PULLUPEN_bm; // Op-amp enable pin
+
+ PORTB.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+ //PORTB.PIN3CTRL = PORT_PULLUPEN_bm; // HDR channel selection
+ PORTB.PIN4CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // switch
+ //PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Aux LED
+
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
+
+ // set up the DAC
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // DAC ranges from 0V to (255 * Vref) / 256
+ VREF.CTRLA |= VREF_DAC0REFSEL_2V5_gc; // also VREF_DAC0REFSEL_0V55_gc and VREF_DAC0REFSEL_1V1_gc and VREF_DAC0REFSEL_2V5_gc
+ VREF.CTRLB |= VREF_DAC0REFEN_bm;
+ DAC0.CTRLA = DAC_ENABLE_bm | DAC_OUTEN_bm;
+ DAC0.DATA = 255; // set the output voltage
+
+}
+
+
+#endif
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