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authorGabriel Hart2021-04-14 14:10:14 -0500
committerGabriel Hart2021-04-14 14:10:14 -0500
commit9dddc98863af8987c671d978d2ce8bc7e67c2e89 (patch)
treebbc9d3df42e9d8b366fefea45ad15700c001153e /hw
parentMerge TKs changes from 2021-01-25 (diff)
parentfixed missing ifdef for simple UI (diff)
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Merge from main branch
Diffstat (limited to '')
-rw-r--r--hwdef-BLF_Q8-T1616.h19
-rw-r--r--hwdef-Sofirn_SP10S.h20
-rw-r--r--hwdef-gchart-fet1-t1616.h (renamed from hwdef-gchart-fet1-t16.h)26
3 files changed, 36 insertions, 29 deletions
diff --git a/hwdef-BLF_Q8-T1616.h b/hwdef-BLF_Q8-T1616.h
index 6dfb4ab..2a0e6ff 100644
--- a/hwdef-BLF_Q8-T1616.h
+++ b/hwdef-BLF_Q8-T1616.h
@@ -24,7 +24,7 @@ Driver pinout:
#define PWM_CHANNELS 2
#ifndef SWITCH_PIN
-#define SWITCH_PIN PIN5_bp
+#define SWITCH_PIN PIN5_bp
#define SWITCH_PORT VPORTA.IN
#define SWITCH_ISC_REG PORTA.PIN2CTRL
#define SWITCH_VECT PORTA_PORT_vect
@@ -34,13 +34,13 @@ Driver pinout:
// 7135 channel
#ifndef PWM1_PIN
-#define PWM1_PIN PB1 //
+#define PWM1_PIN PB1 //
#define PWM1_LVL TCA0.SINGLE.CMP1 // CMP1 is the output compare register for PB1
#endif
// FET channel
#ifndef PWM2_PIN
-#define PWM2_PIN PB0 //
+#define PWM2_PIN PB0 //
#define PWM2_LVL TCA0.SINGLE.CMP0 // CMP0 is the output compare register for PB0
#endif
@@ -61,8 +61,8 @@ Driver pinout:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = ...;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm; // Outputs: Aux LED and PWMs
@@ -77,20 +77,21 @@ inline void hwdef_setup() {
PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // eSwitch
PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
-
+
//PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
//PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Aux LED
-
+
PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
-
- // set up the PWM
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
diff --git a/hwdef-Sofirn_SP10S.h b/hwdef-Sofirn_SP10S.h
index 75d79a1..0ee3332 100644
--- a/hwdef-Sofirn_SP10S.h
+++ b/hwdef-Sofirn_SP10S.h
@@ -1,6 +1,8 @@
#ifndef HWDEF_SOFIRN_SP10S_H
#define HWDEF_SOFIRN_SP10S_H
+// TODO: rename to sofirn-sp10s-gchart?
+
/* gChart's PIC12 to ATTINY1616 v1 adapter for the SP10S
https://oshpark.com/shared_projects/b4IZEGSy
@@ -34,7 +36,7 @@ ATTINY1616 Mapping:
#include <avr/io.h>
#ifndef SWITCH_PIN
-#define SWITCH_PIN 3
+#define SWITCH_PIN 3
#define SWITCH_PORT VPORTB.IN
#define SWITCH_ISC_REG PORTB.PIN3CTRL
#define SWITCH_VECT PORTB_PORT_vect
@@ -81,14 +83,13 @@ ATTINY1616 Mapping:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
VPORTA.DIR = PIN1_bm; // Boost enable pin
VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output
//VPORTC.DIR = ...;
-
// enable pullups on the input pins to reduce power
PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
//PORTA.PIN1CTRL = PORT_PULLUPEN_bm; // Boost enable pin
@@ -98,21 +99,22 @@ inline void hwdef_setup() {
PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
-
+
//PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // Big PWM channel
PORTB.PIN1CTRL = PORT_PULLUPEN_bm;
PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
PORTB.PIN3CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // Switch
//PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider
//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel
-
+
//PORTC.PIN0CTRL = PORT_PULLUPEN_bm; connected to the ADC via airwire
PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
-
- // set up the PWM
- PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
+ PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
diff --git a/hwdef-gchart-fet1-t16.h b/hwdef-gchart-fet1-t1616.h
index e8fd11c..365ecd7 100644
--- a/hwdef-gchart-fet1-t16.h
+++ b/hwdef-gchart-fet1-t1616.h
@@ -1,5 +1,5 @@
-#ifndef HWDEF_GCH_FET1_T16_H
-#define HWDEF_GCH_FET1_T16_H
+#ifndef HWDEF_GCH_FET1_T1616_H
+#define HWDEF_GCH_FET1_T1616_H
/* gChart's custom FET+1 driver layout
@@ -23,7 +23,7 @@ Read voltage from VCC pin, has diode with ~0.4v drop
#define PWM_CHANNELS 2
#ifndef SWITCH_PIN
-#define SWITCH_PIN PIN2_bp
+#define SWITCH_PIN PIN2_bp
#define SWITCH_PORT VPORTB.IN
#define SWITCH_ISC_REG PORTB.PIN2CTRL
#define SWITCH_VECT PORTB_PORT_vect
@@ -33,13 +33,13 @@ Read voltage from VCC pin, has diode with ~0.4v drop
// 7135 channel
#ifndef PWM1_PIN
-#define PWM1_PIN PB1 //
+#define PWM1_PIN PB1 //
#define PWM1_LVL TCA0.SINGLE.CMP1 // CMP1 is the output compare register for PB1
#endif
// FET channel
#ifndef PWM2_PIN
-#define PWM2_PIN PB0 //
+#define PWM2_PIN PB0 //
#define PWM2_LVL TCA0.SINGLE.CMP0 // CMP0 is the output compare register for PB0
#endif
@@ -60,8 +60,8 @@ Read voltage from VCC pin, has diode with ~0.4v drop
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = 0b00000010;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm;
@@ -76,20 +76,24 @@ inline void hwdef_setup() {
PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
-
+
//PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
//PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
PORTB.PIN2CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // switch
//PORTB.PIN3CTRL = PORT_PULLUPEN_bm; // Aux LED
PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
-
+
PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
-
- // set up the PWM
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
+ // TODO: measure 5 MHz fast PWM vs 10 MHz phase-correct, to see if it
+ // still has issues at 0/255 and 255/255 like older models did
+ // (and maybe switch to phase-correct@10MHz)
TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
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