merged recent fsm branch updates

7 files changed, 79 insertions, 38 deletions

diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h
index 1a05741..7dcc8a0 100644
--- a/hwdef-BLF_GT.h
+++ b/hwdef-BLF_GT.h
@@ -9,29 +9,43 @@
 
 #define PWM_CHANNELS 2
 
+#ifndef AUXLED_PIN
 #define AUXLED_PIN   PB4    // pin 3
+#endif
 
+#ifndef SWITCH_PIN
 #define SWITCH_PIN   PB3    // pin 2
 #define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
 
+#ifndef PWM1_PIN
 #define PWM1_PIN PB0        // pin 5, 1x7135 PWM
 #define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
+#endif
+#ifndef PWM2_PIN
 #define PWM2_PIN PB1        // pin 6, FET PWM
 #define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
+#endif
 
 #define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC
+#ifndef VOLTAGE_PIN
 #define VOLTAGE_PIN PB2     // pin 7, voltage ADC
 #define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define VOLTAGE_ADC_DIDR ADC1D  // Digital input disable bit corresponding with PB2
 // 1.1V reference, left-adjust, ADC1/PB2
 //#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
 // 1.1V reference, no left-adjust, ADC1/PB2
 #define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
-#define VOLTAGE_ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+#endif
 #define ADC_PRSCL   0x06    // clk/64
 
 // Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
+#ifndef ADC_44
 #define ADC_44 184
+#endif
+#ifndef ADC_22
 #define ADC_22 92
+#endif
 
 #define TEMP_CHANNEL 0b00001111
 
diff --git a/hwdef-BLF_GT_Mini.h b/hwdef-BLF_GT_Mini.h
index 504c561..aacbca4 100644
--- a/hwdef-BLF_GT_Mini.h
+++ b/hwdef-BLF_GT_Mini.h
@@ -2,3 +2,9 @@
  */
 // exactly the same as a D1S, but with a lighted button
 #include "hwdef-Emisar_D1S.h"
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN   PB4    // pin 3
+#endif
+
diff --git a/hwdef-BLF_Q8.h b/hwdef-BLF_Q8.h
index f00c392..6e13faf 100644
--- a/hwdef-BLF_Q8.h
+++ b/hwdef-BLF_Q8.h
@@ -1,16 +1,17 @@
 /* BLF Q8 driver layout
+ * Q8 driver is the same as a D4, basically
  */
-// Q8 driver is the same as a D4, basically
-#include "hwdef-Emisar_D4.h"
 
 // ... except the Q8 has a lighted button
 #ifndef AUXLED_PIN
 #define AUXLED_PIN   PB4    // pin 3
 #endif
 
-// average drop across diode on this hardware
-#ifdef VOLTAGE_FUDGE_FACTOR
-#undef VOLTAGE_FUDGE_FACTOR
-#endif
+// ... and slightly different calibration
+#ifndef VOLTAGE_FUDGE_FACTOR
 #define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+// Q8 driver is the same as a D4, basically
+#include "hwdef-Emisar_D4.h"
 
diff --git a/hwdef-Emisar_D4.h b/hwdef-Emisar_D4.h
index 105d3b9..0dfcab9 100644
--- a/hwdef-Emisar_D4.h
+++ b/hwdef-Emisar_D4.h
@@ -9,24 +9,32 @@
 
 #define PWM_CHANNELS 2
 
-#define AUXLED_PIN   PB4    // pin 3
+//#define AUXLED_PIN   PB4    // pin 3
 
+#ifndef SWITCH_PIN
 #define SWITCH_PIN   PB3    // pin 2
 #define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
 
+#ifndef PWM1_PIN
 #define PWM1_PIN PB0        // pin 5, 1x7135 PWM
 #define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
+#endif
+#ifndef PWM2_PIN
 #define PWM2_PIN PB1        // pin 6, FET PWM
 #define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
+#endif
 
 // (FIXME: remove?  not used?)
-#define VOLTAGE_PIN PB2     // pin 7, voltage ADC
-#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
-#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+//#define VOLTAGE_PIN PB2     // pin 7, voltage ADC
+//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
+//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
 #define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
 #define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
+#endif
 
 //#define TEMP_DIDR   ADC4D
 #define TEMP_CHANNEL 0b00001111
diff --git a/hwdef-FF_PL47.h b/hwdef-FF_PL47.h
index 4189220..217ce45 100644
--- a/hwdef-FF_PL47.h
+++ b/hwdef-FF_PL47.h
@@ -1,24 +1,23 @@
 /* Fireflies PL47 driver layout
+ * same as a D4S, basically, except ...
  */
-// same as a D4S, basically
-#include "hwdef-Emisar_D4S.h"
-#undef FSM_EMISAR_D4S_DRIVER
-#undef FSM_EMISAR_D4_DRIVER
 
-// ... except the PL47 has aux LEDs on pin 7
-#ifdef AUXLED_PIN
-#undef AUXLED_PIN
-#endif
+// ... the PL47 has aux LEDs on pin 7
+#ifndef AUXLED_PIN
 #define AUXLED_PIN   PB2    // pin 7
+#endif
 
 // ... and switch LEDs on pin 3
-#ifdef AUXLED2_PIN
-#undef AUXLED2_PIN
-#endif
+#ifndef AUXLED2_PIN
 #define AUXLED2_PIN   PB4    // pin 3
-
-// average drop across diode on this hardware
-#ifdef VOLTAGE_FUDGE_FACTOR
-#undef VOLTAGE_FUDGE_FACTOR
 #endif
+
+// ... and slightly different calibration
+#ifndef VOLTAGE_FUDGE_FACTOR
 #define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+#include "hwdef-Emisar_D4S.h"
+#undef FSM_EMISAR_D4S_DRIVER
+#undef FSM_EMISAR_D4_DRIVER
+
diff --git a/hwdef-FF_ROT66.h b/hwdef-FF_ROT66.h
index 49947ab..0913a76 100644
--- a/hwdef-FF_ROT66.h
+++ b/hwdef-FF_ROT66.h
@@ -1,20 +1,21 @@
 /* Fireflies ROT66 driver layout
+ * same as a FW3A, basically, except ...
  */
-// same as a FW3A, basically
-#include "hwdef-FW3A.h"
 
 // ... except the ROT66 has a lighted button
 #ifndef AUXLED_PIN
 #define AUXLED_PIN   PB2    // pin 7
 #endif
 
+// ... and slightly different calibration
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+#include "hwdef-FW3A.h"
+
 // ... and no optic nerve
 #ifdef VISION_PIN
 #undef VISION_PIN
 #endif
 
-// average drop across diode on this hardware
-#ifdef VOLTAGE_FUDGE_FACTOR
-#undef VOLTAGE_FUDGE_FACTOR
-#endif
-#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
index 5e253c7..8abab9a 100644
--- a/hwdef-FW3A.h
+++ b/hwdef-FW3A.h
@@ -9,23 +9,35 @@
 
 #define PWM_CHANNELS 3
 
+#ifndef SWITCH_PIN
 #define SWITCH_PIN   PB3    // pin 2
 #define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
 
+#ifndef PWM1_PIN
 #define PWM1_PIN PB0        // pin 5, 1x7135 PWM
 #define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
-#define PWM2_PIN PB1        // pin 6, FET PWM
+#endif
+#ifndef PWM2_PIN
+#define PWM2_PIN PB1        // pin 6, 7x7135 PWM
 #define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
-#define PWM3_PIN PB4        // pin 3
-#define PWM3_LVL OCR1B
+#endif
+#ifndef PWM3_PIN
+#define PWM3_PIN PB4        // pin 3, FET PWM
+#define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB4
+#endif
 
+#ifndef VISION_PIN
 #define VISION_PIN PB2      // pin 7, optic nerve
-#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
-#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
+//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+#endif
 #define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
 #define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
+#endif
 
 //#define TEMP_DIDR   ADC4D
 #define TEMP_CHANNEL 0b00001111