rewrote blf-lantern (blf-lt1) code to use multi-channel and PWM+DSM,

which required ... a few pretty significant changes:
- no dynamic underclocking (it isn't compatible with DSM yet)
- no tint ramping brightness correction (removed to save space)
- removed ramp blinks (to save space, and because they're annoying)
- removed momentary mode (to save space)
- removed SOS mode (to save space)
- removed (to save space) some other relatively recent features which
  weren't present in the original production firmware
... but some other things improved:
+ added smooth steps
+ extended Simple UI
+ added stepped tint ramping
+ added 13H factory reset, to save wear on threads
+ lower lows
+ smoother ramp
+ much higher tint ramp resolution in low modes

I'm not entirely happy with this yet, so it probably needs additional work
later in order to adjust the weird ramp shape (these 7135 chips have a weird
response curve), add dynamic underclocking, cut down the ROM size if possible,
re-add tint ramping brightness correction, etc.  Multi-channel stuff in
particular added a lot to the size.

This is a pretty big change from the previous working build, so some users
may want to stick with the last pre-multi-channel version.  Non-trivial
sacrifices were made to bring in more recent features.

3 files changed, 303 insertions, 58 deletions

diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h
deleted file mode 100644
index e7c4791..0000000
--- a/hwdef-BLF_LT1.h
+++ /dev/null
@@ -1,58 +0,0 @@
-// BLF LT1 driver layout
-// Copyright (C) 2018-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- *           ----
- *   Reset -|1  8|- VCC
- * eswitch -|2  7|- (unused)
- * aux LED -|3  6|- PWM (5000K)
- *     GND -|4  5|- PWM (3000K)
- *           ----
- */
-
-#define ATTINY 85
-#include <avr/io.h>
-
-#define PWM_CHANNELS 1  // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs)
-#define PWM_BITS 9      // 0 to 255 at 15.6 kHz, but goes to 510 for "200%" turbo
-#define PWM_TOP 255
-
-// dynamic PWM with tint ramping (not supported on attiny85)
-//#define USE_DYN_PWM     // dynamic frequency and speed
-//#define PWM1_CNT TCNT0  // for dynamic PWM, reset phase
-//#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
-//#define PWM1_PHASE_RESET_ON   // force reset while turning on
-//#define PWM1_PHASE_SYNC       // manual sync while changing level
-
-// usually PWM1_LVL would be a hardware register, but we need to abstract
-// it out to a soft brightness value, in order to handle tint ramping
-// (this allows smooth thermal regulation to work, and makes things
-//  otherwise simpler and easier)
-uint16_t PWM1_LVL;
-
-#define PWM1_PIN PB0        // pin 5, warm tint PWM
-#define TINT1_LVL OCR0A     // OCR0A is the output compare register for PB0
-
-#define PWM2_PIN PB1        // pin 6, cold tint PWM
-#define TINT2_LVL OCR0B     // OCR0B is the output compare register for PB1
-
-
-#define AUXLED_PIN   PB4    // pin 3
-
-#define SWITCH_PIN   PB3    // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-
-#define ADC_PRSCL   0x07    // clk/128
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
-#endif
-
-#define FAST 0xA3           // fast PWM both channels
-#define PHASE 0xA1          // phase-correct PWM both channels
-
-#define LAYOUT_DEFINED
-
diff --git a/hwdef-blf-lt1.c b/hwdef-blf-lt1.c
new file mode 100644
index 0000000..df17612
--- /dev/null
+++ b/hwdef-blf-lt1.c
@@ -0,0 +1,197 @@
+// BLF LT1 PWM functions
+// Copyright (C) 2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+
+void set_level_zero();
+
+void set_level_ch1(uint8_t level);
+void set_level_ch2(uint8_t level);
+void set_level_both(uint8_t level);
+void set_level_blend(uint8_t level);
+//void set_level_auto(uint8_t level);  // redundant
+
+#if 0  // gradual adjustments are disabled to save space
+bool gradual_tick_ch1(uint8_t gt);
+bool gradual_tick_ch2(uint8_t gt);
+bool gradual_tick_both(uint8_t gt);
+bool gradual_tick_blend(uint8_t gt);
+//bool gradual_tick_auto(uint8_t gt);  // redundant
+#endif
+
+
+Channel channels[] = {
+    { // channel 1 only
+        .set_level    = set_level_ch1,
+        //.gradual_tick = gradual_tick_ch1,
+        .has_args     = 0
+    },
+    { // channel 2 only
+        .set_level    = set_level_ch2,
+        //.gradual_tick = gradual_tick_ch2,
+        .has_args     = 0
+    },
+    { // both channels, tied together (max "200%" power)
+        .set_level    = set_level_both,
+        //.gradual_tick = gradual_tick_both,
+        .has_args     = 0
+    },
+    { // both channels, manual blend (max "100%" power)
+        .set_level    = set_level_blend,
+        //.gradual_tick = gradual_tick_blend,
+        .has_args     = 1
+    },
+    { // both channels, auto blend
+        .set_level    = set_level_blend,
+        //.gradual_tick = gradual_tick_blend,
+        .has_args     = 1
+    },
+};
+
+void set_level_zero() {
+    // turn off all LEDs
+    ch1_dsm_lvl = 0;
+    ch2_dsm_lvl = 0;
+    CH1_PWM     = 0;
+    CH2_PWM     = 0;
+}
+
+// wrap setting the dsm vars, to get a faster response
+// (just setting *_dsm_lvl doesn't work well for strobes)
+void set_hw_levels(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
+    // set delta-sigma soft levels
+    ch1_dsm_lvl = ch1;
+    ch2_dsm_lvl = ch2;
+
+    // set hardware PWM levels and init dsm loop
+    CH1_PWM = ch1_pwm = ch1 >> 7;
+    CH2_PWM = ch2_pwm = ch2 >> 7;
+}
+
+// delta-sigma modulation of PWM outputs
+// happens on each Timer0 overflow (every 512 cpu clock cycles)
+// uses 8-bit pwm w/ 7-bit dsm (0b 0PPP PPPP PDDD DDDD)
+ISR(TIMER0_OVF_vect) {
+    // set new hardware values first,
+    // for best timing (reduce effect of interrupt jitter)
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+
+    // calculate next values, now that timing matters less
+
+    // accumulate error
+    ch1_dsm += (ch1_dsm_lvl & 0x007f);
+    // next PWM = base PWM value + carry bit
+    ch1_pwm  = (ch1_dsm_lvl >> 7) + (ch1_dsm > 0x7f);
+    // clear carry bit
+    ch1_dsm &= 0x7f;
+
+    // repeat for other channels
+
+    ch2_dsm += (ch2_dsm_lvl & 0x007f);
+    ch2_pwm  = (ch2_dsm_lvl >> 7) + (ch2_dsm > 0x7f);
+    ch2_dsm &= 0x7f;
+}
+
+
+void set_level_ch1(uint8_t level) {
+    set_hw_levels(PWM_GET(pwm1_levels, level), 0);
+}
+
+void set_level_ch2(uint8_t level) {
+    set_hw_levels(0, PWM_GET(pwm1_levels, level));
+}
+
+void set_level_both(uint8_t level) {
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, level);
+    set_hw_levels(pwm, pwm);
+}
+
+void blend_helper(PWM_DATATYPE *warm, PWM_DATATYPE *cool, uint8_t level) {
+    PWM_DATATYPE brightness = PWM_GET(pwm1_levels, level);
+    uint8_t blend;
+    if (channel_mode == CM_AUTO) {
+        blend = 255 * (uint16_t)level / RAMP_SIZE;
+        if (cfg.channel_mode_args[channel_mode] & 0b01000000)
+            blend = 255 - blend;
+    } else {
+        blend = cfg.channel_mode_args[channel_mode];
+    }
+
+    calc_2ch_blend(warm, cool, brightness, DSM_TOP, blend);
+}
+
+void set_level_blend(uint8_t level) {
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, level);
+    set_hw_levels(warm, cool);
+}
+
+/*
+void set_level_auto(uint8_t level) {
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, level);
+    set_hw_levels(warm, cool);
+}
+*/
+
+///// "gradual tick" functions for smooth thermal regulation /////
+// (and other smooth adjustments)
+
+#if 0  // disabled to save space
+///// bump each channel toward a target value /////
+bool gradual_adjust(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
+    // adjust multiple times based on current brightness
+    // (so it adjusts faster/coarser when bright, slower/finer when dim)
+
+    // higher shift = slower/finer adjustments
+    const uint8_t shift = 9;  // ((255 << 7) >> 9) = 63 max
+    uint8_t steps;
+
+    steps = ch1_dsm_lvl >> shift;
+    for (uint8_t i=0; i<=steps; i++)
+        GRADUAL_ADJUST_SIMPLE(ch1, ch1_dsm_lvl);
+
+    steps = ch2_dsm_lvl  >> shift;
+    for (uint8_t i=0; i<=steps; i++)
+        GRADUAL_ADJUST_SIMPLE(ch2, ch2_dsm_lvl);
+
+    if ((ch1 == ch1_dsm_lvl)
+     && (ch2 == ch2_dsm_lvl )) {
+        return true;  // done
+    }
+    return false;  // not done yet
+}
+
+bool gradual_tick_ch1(uint8_t gt) {
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
+    return gradual_adjust(pwm, 0);
+}
+
+bool gradual_tick_ch2(uint8_t gt) {
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
+    return gradual_adjust(0, pwm);
+}
+
+bool gradual_tick_both(uint8_t gt) {
+    PWM_DATATYPE pwm = PWM_GET(pwm1_levels, gt);
+    return gradual_adjust(pwm, pwm);
+}
+
+bool gradual_tick_blend(uint8_t gt) {
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, gt);
+    return gradual_adjust(warm, cool);
+}
+
+/*
+bool gradual_tick_auto(uint8_t gt) {
+    PWM_DATATYPE warm, cool;
+    blend_helper(&warm, &cool, gt);
+    return gradual_adjust(warm, cool);
+}
+*/
+
+#endif  // if 0
+
diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h
new file mode 100644
index 0000000..571fa44
--- /dev/null
+++ b/hwdef-blf-lt1.h
@@ -0,0 +1,106 @@
+// BLF LT1 driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ *           ----
+ *   Reset -|1  8|- VCC
+ * eswitch -|2  7|- (unused)
+ * aux LED -|3  6|- PWM (5000K)
+ *     GND -|4  5|- PWM (3000K)
+ *           ----
+ */
+
+#define ATTINY 85
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-blf-lt1.c
+
+// channel modes:
+// * 0. channel 1 only
+// * 1. channel 2 only
+// * 2. both channels, tied together, max "200%" power
+// * 3. both channels, manual blend, max "100%" power
+// * 4. both channels, auto blend, reversible
+#define NUM_CHANNEL_MODES   5
+enum channel_modes_e {
+    CM_CH1 = 0,
+    CM_CH2,
+    CM_BOTH,
+    CM_BLEND,
+    CM_AUTO,
+};
+
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b00011000
+#define USE_CHANNEL_MODE_ARGS
+// _, _, _, 128=middle CCT, 0=warm-to-cool
+#define CHANNEL_MODE_ARGS     0,0,0,128,0
+
+// can use some of the common handlers
+#define USE_CALC_2CH_BLEND
+
+
+#define PWM_CHANNELS   1  // old, remove this
+
+#define PWM_BITS      16  // 8-bit hardware PWM + 16-bit DSM
+
+#define PWM_GET       PWM_GET16
+#define PWM_DATATYPE  uint16_t
+#define PWM_DATATYPE2 uint32_t  // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint16_t  // 15-bit PWM+DSM ramp
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP_INIT  255
+#define DSM_TOP       (255<<7) // 15-bit resolution leaves 1 bit for carry
+
+// warm LEDs
+uint16_t ch1_dsm_lvl;
+uint8_t ch1_pwm, ch1_dsm;
+#define CH1_PIN  PB1        // pin 6, warm tint PWM
+#define CH1_PWM  OCR0B      // OCR0B is the output compare register for PB1
+
+// cold LEDs
+uint16_t ch2_dsm_lvl;
+uint8_t ch2_pwm, ch2_dsm;
+#define CH2_PIN  PB0        // pin 5, cold tint PWM
+#define CH2_PWM  OCR0A      // OCR0A is the output compare register for PB0
+
+#define AUXLED_PIN   PB4    // pin 3
+
+// e-switch
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+#define ADC_PRSCL   0x07    // clk/128
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+
+inline void hwdef_setup() {
+    // configure PWM channels
+    DDRB = (1 << CH1_PIN)
+         | (1 << CH2_PIN);
+
+    TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...)
+    TCCR0A = PHASE;
+
+    // enable timer 0 overflow interrupt for DSM purposes
+    TIMSK |= (1 << TOIE0);
+
+    // configure e-switch
+    PORTB = (1 << SWITCH_PIN);  // e-switch is the only input
+    PCMSK = (1 << SWITCH_PIN);  // pin change interrupt uses this pin
+}
+
+
+#define LAYOUT_DEFINED
+