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authorSelene ToyKeeper2021-04-02 14:34:10 -0600
committerSelene ToyKeeper2021-04-02 14:34:10 -0600
commit7713133fedd51212eee10c8ed855e512820ff5fb (patch)
treeaca9e6bf2fb078aa50ad71800afeace32be61daa /hw
parentupdated MODELS file with missing K9.3-nofet build target (diff)
parentre-numbered t1616 builds to reflect manufacturer better (diff)
downloadanduril-7713133fedd51212eee10c8ed855e512820ff5fb.tar.gz
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merged gchart's Tiny1 series branch for t1616 support
Diffstat (limited to '')
-rw-r--r--hwdef-BLF_Q8-T1616.h101
-rw-r--r--hwdef-Sofirn_SP10S.h124
-rw-r--r--hwdef-gchart-fet1-t1616.h103
3 files changed, 328 insertions, 0 deletions
diff --git a/hwdef-BLF_Q8-T1616.h b/hwdef-BLF_Q8-T1616.h
new file mode 100644
index 0000000..2a0e6ff
--- /dev/null
+++ b/hwdef-BLF_Q8-T1616.h
@@ -0,0 +1,101 @@
+#ifndef HWDEF_BLF_Q8_T1616_H
+#define HWDEF_BLF_Q8_T1616_H
+
+/* BLF Q8 driver layout using the Attiny1616
+
+Driver pinout:
+ * eSwitch: PA5
+ * Aux LED: PB5
+ * PWM FET: PB0 (TCA0 WO0)
+ * PWM 1x7135: PB1 (TCA0 WO1)
+ * Voltage: VCC
+
+*/
+
+
+#define LAYOUT_DEFINED
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define PWM_CHANNELS 2
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN PIN5_bp
+#define SWITCH_PORT VPORTA.IN
+#define SWITCH_ISC_REG PORTA.PIN2CTRL
+#define SWITCH_VECT PORTA_PORT_vect
+#define SWITCH_INTFLG VPORTA.INTFLAGS
+#endif
+
+
+// 7135 channel
+#ifndef PWM1_PIN
+#define PWM1_PIN PB1 //
+#define PWM1_LVL TCA0.SINGLE.CMP1 // CMP1 is the output compare register for PB1
+#endif
+
+// FET channel
+#ifndef PWM2_PIN
+#define PWM2_PIN PB0 //
+#define PWM2_LVL TCA0.SINGLE.CMP0 // CMP0 is the output compare register for PB0
+#endif
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
+#endif
+
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN PIN5_bp
+#define AUXLED_PORT PORTB
+#endif
+
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+
+ //VPORTA.DIR = ...;
+ VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm; // Outputs: Aux LED and PWMs
+ //VPORTC.DIR = ...;
+
+ // enable pullups on the unused pins to reduce power
+ PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // eSwitch
+ PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+ //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
+ //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
+ PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
+ //PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Aux LED
+
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ TCA0.SINGLE.PER = 255;
+ TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
+}
+
+
+#endif
diff --git a/hwdef-Sofirn_SP10S.h b/hwdef-Sofirn_SP10S.h
new file mode 100644
index 0000000..0ee3332
--- /dev/null
+++ b/hwdef-Sofirn_SP10S.h
@@ -0,0 +1,124 @@
+#ifndef HWDEF_SOFIRN_SP10S_H
+#define HWDEF_SOFIRN_SP10S_H
+
+// TODO: rename to sofirn-sp10s-gchart?
+
+/* gChart's PIC12 to ATTINY1616 v1 adapter for the SP10S
+https://oshpark.com/shared_projects/b4IZEGSy
+
+PIC12 Pinout:
+1 - VDD
+2 - No Connect
+3 - Low Channel FET (series 4.7K Ohms)
+4 - Switch
+5 - High Channel FET (main PWM)
+6 - Voltage Divider (300K:100K Ohms)
+7 - Boost chip enable
+8 - GND
+
+ATTINY1616 Mapping:
+2 - PA5 : (no connect)
+3 - PB5 : TCA0 - WO2 Alternate MUX
+4 - PB3 : (switch)
+5 - PB0 : TCA0 - WO0
+6 - PB4 : ADC0 - AIN9
+7 - PA1 : (boost enable)
+
+*/
+
+
+#define LAYOUT_DEFINED
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1616
+#include <avr/io.h>
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN 3
+#define SWITCH_PORT VPORTB.IN
+#define SWITCH_ISC_REG PORTB.PIN3CTRL
+#define SWITCH_VECT PORTB_PORT_vect
+#define SWITCH_INTFLG VPORTB.INTFLAGS
+#endif
+
+#define PWM_CHANNELS 2
+
+// Small channel
+#ifndef PWM1_PIN
+#define PWM1_PIN PB5
+#define PWM1_LVL TCA0.SINGLE.CMP2 // PB5 is Alternate MUX for TCA Compare 2
+#endif
+
+// Big channel
+#ifndef PWM2_PIN
+#define PWM2_PIN PB0
+#define PWM2_LVL TCA0.SINGLE.CMP0 // PB0 is TCA Compare 0
+#endif
+
+#define LED_ENABLE_PIN PIN1_bp
+#define LED_ENABLE_PORT PORTA_OUT
+
+#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
+#define DUAL_VOLTAGE_FLOOR 20 // for AA/14500 boost drivers, don't indicate low voltage if below this level
+#define DUAL_VOLTAGE_LOW_LOW 07 // the lower voltage range's danger zone 0.7 volts
+#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
+// Resistors are 300,000 and 100,000
+#ifndef ADC_44
+#define ADC_44 1023 // raw value at 4.40V
+#endif
+#ifndef ADC_22
+#define ADC_22 512 // raw value at 2.20V
+#endif
+
+
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+
+ VPORTA.DIR = PIN1_bm; // Boost enable pin
+ VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output
+ //VPORTC.DIR = ...;
+
+ // enable pullups on the input pins to reduce power
+ PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+ //PORTA.PIN1CTRL = PORT_PULLUPEN_bm; // Boost enable pin
+ PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+ //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // Big PWM channel
+ PORTB.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN3CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // Switch
+ //PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider
+ //PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel
+
+ //PORTC.PIN0CTRL = PORT_PULLUPEN_bm; connected to the ADC via airwire
+ PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
+ PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ TCA0.SINGLE.PER = 255;
+ TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
+}
+
+
+#endif
diff --git a/hwdef-gchart-fet1-t1616.h b/hwdef-gchart-fet1-t1616.h
new file mode 100644
index 0000000..365ecd7
--- /dev/null
+++ b/hwdef-gchart-fet1-t1616.h
@@ -0,0 +1,103 @@
+#ifndef HWDEF_GCH_FET1_T1616_H
+#define HWDEF_GCH_FET1_T1616_H
+
+/* gChart's custom FET+1 driver layout
+
+PB0 - PWM for FET (TCA - WO0)
+PB1 - PWM for 7135 (TCA - WO1)
+PB2 - Switch pin, internal pullup
+PB3 - Aux LED with 4700 Ohm series resistor
+Read voltage from VCC pin, has diode with ~0.4v drop
+
+*/
+
+
+#define LAYOUT_DEFINED
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define PWM_CHANNELS 2
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN PIN2_bp
+#define SWITCH_PORT VPORTB.IN
+#define SWITCH_ISC_REG PORTB.PIN2CTRL
+#define SWITCH_VECT PORTB_PORT_vect
+#define SWITCH_INTFLG VPORTB.INTFLAGS
+#endif
+
+
+// 7135 channel
+#ifndef PWM1_PIN
+#define PWM1_PIN PB1 //
+#define PWM1_LVL TCA0.SINGLE.CMP1 // CMP1 is the output compare register for PB1
+#endif
+
+// FET channel
+#ifndef PWM2_PIN
+#define PWM2_PIN PB0 //
+#define PWM2_LVL TCA0.SINGLE.CMP0 // CMP0 is the output compare register for PB0
+#endif
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 8 // 4 = add 0.20V
+#endif
+
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN PIN3_bp
+#define AUXLED_PORT PORTB
+#endif
+
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+
+ // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+
+ //VPORTA.DIR = 0b00000010;
+ VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm;
+ //VPORTC.DIR = 0b00000000;
+
+ // enable pullups on the input pins to reduce power
+ PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN5CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+ //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
+ //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
+ PORTB.PIN2CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // switch
+ //PORTB.PIN3CTRL = PORT_PULLUPEN_bm; // Aux LED
+ PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
+
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
+
+ // set up the PWM
+ // TODO: add references to MCU documentation
+ // TODO: measure 5 MHz fast PWM vs 10 MHz phase-correct, to see if it
+ // still has issues at 0/255 and 255/255 like older models did
+ // (and maybe switch to phase-correct@10MHz)
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ TCA0.SINGLE.PER = 255;
+ TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
+}
+
+
+#endif
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