merged fsm to trunk... lots of updates:

+ attiny1634 support
+ Emisar D4v2 support
+ Mateminco MF01S / MT18 support
+ Fireflies E01 and E07v2 support
+ RGB aux LED support
+ added factory reset function
+ added manual / automatic memory toggle
+ added 2-level brightness during lockout
+ added Fireflies UI
+ made momentary mode also support strobe-group modes
* thermal regulation rewritten, behaves mostly better now
* strobe modes auto-reverse their ramp now
* muggle mode fixes
* UI diagram and manual updated
* button timing adjusted, and compile-time options added for it
* general refactoring

2 files changed, 160 insertions, 0 deletions

diff --git a/hwdef-Emisar_D4v2.h b/hwdef-Emisar_D4v2.h
new file mode 100644
index 0000000..0460fad
--- /dev/null
+++ b/hwdef-Emisar_D4v2.h
@@ -0,0 +1,100 @@
+#ifndef HWDEF_EMISAR_D4V2_H
+#define HWDEF_EMISAR_D4V2_H
+
+/* Emisar D4v2 driver layout (attiny1634)
+ *
+ * Pin / Name / Function
+ *   1    PA6   FET PWM (PWM1B)
+ *   2    PA5   red aux LED (PWM0B)
+ *   3    PA4   green aux LED
+ *   4    PA3   blue aux LED
+ *   5    PA2   e-switch
+ *   6    PA1   (none)
+ *   7    PA0   (none)
+ *   8    GND   GND
+ *   9    VCC   VCC
+ *  10    PC5   (none)
+ *  11    PC4   (none)
+ *  12    PC3   RESET
+ *  13    PC2   (none)
+ *  14    PC1   SCK
+ *  15    PC0   (none) PWM0A
+ *  16    PB3   7135 PWM (PWM1A)
+ *  17    PB2   MISO
+ *  18    PB1   MOSI
+ *  19    PB0   (none)
+ *  20    PA7   (none)
+ *      ADC12   thermal sensor
+ */
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1634
+#include <avr/io.h>
+
+#define PWM_CHANNELS 2
+
+#define SWITCH_PIN   PA2    // pin 5
+#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt
+#define SWITCH_PCIE  PCIE0  // PCIE0 is for PCINT[7:0]
+#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0]
+#define SWITCH_PORT  PINA   // PINA or PINB or PINC
+
+#define PWM1_PIN PB3        // pin 16, 1x7135 PWM
+#define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
+
+#define PWM2_PIN PA6        // pin 1, FET PWM
+#define PWM2_LVL OCR1B      // OCR1B is the output compare register for PB1
+
+
+#define ADC_PRSCL   0x06    // clk/64
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 4  // add 0.20V  (measured 0.22V)
+#endif
+
+#define TEMP_CHANNEL 0b00001111
+
+// this light has aux LEDs under the optic
+#define AUXLED_R_PIN   PA5    // pin 2
+#define AUXLED_G_PIN   PA4    // pin 3
+#define AUXLED_B_PIN   PA3    // pin 4
+#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC
+#define AUXLED_RGB_DDR DDRA   // DDRA or DDRB or DDRC
+#define AUXLED_RGB_PUE PUEA   // PUEA or PUEB or PUEC
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+  // enable output ports
+  // 7135
+  DDRB = (1 << PWM1_PIN);
+  // FET, aux R/G/B
+  DDRA = (1 << PWM2_PIN)
+       | (1 << AUXLED_R_PIN)
+       | (1 << AUXLED_G_PIN)
+       | (1 << AUXLED_B_PIN)
+       ;
+
+  // configure PWM
+  // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
+  // pre-scale for timer: N = 1
+  TCCR1A  = (0<<WGM11)  | (1<<WGM10)   // 8-bit (TOP=0xFF) (DS table 12-5)
+          | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
+          | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
+          ;
+  TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
+          | (0<<WGM13)  | (0<<WGM12)  // phase-correct PWM (DS table 12-5)
+          ;
+
+  // set up e-switch
+  //PORTA = (1 << SWITCH_PIN);  // TODO: configure PORTA / PORTB / PORTC?
+  PUEA = (1 << SWITCH_PIN);  // pull-up for e-switch
+  SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
+}
+
+#define LAYOUT_DEFINED
+
+#endif
diff --git a/hwdef-Mateminco_MF01S.h b/hwdef-Mateminco_MF01S.h
new file mode 100644
index 0000000..ab1c5bf
--- /dev/null
+++ b/hwdef-Mateminco_MF01S.h
@@ -0,0 +1,60 @@
+#ifndef HWDEF_MF01S_H
+#define HWDEF_MF01S_H
+
+/* MF01S driver layout
+ *           ----
+ *   Reset -|1  8|- VCC (unused)
+ * eswitch -|2  7|- Voltage divider (2S)
+ * AUX LED -|3  6|- PWM (FET)
+ *     GND -|4  5|- PWM (smaller FET)
+ *           ----
+ */
+
+#define PWM_CHANNELS 2
+
+#ifndef AUXLED_PIN
+#define AUXLED_PIN   PB4    // pin 3
+#endif
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
+
+#ifndef PWM1_PIN
+#define PWM1_PIN PB0        // pin 5, 1x7135 PWM
+#define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
+#endif
+#ifndef PWM2_PIN
+#define PWM2_PIN PB1        // pin 6, FET PWM
+#define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
+#endif
+
+#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC
+#ifndef VOLTAGE_PIN
+#define VOLTAGE_PIN PB2     // pin 7, voltage ADC
+#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define VOLTAGE_ADC_DIDR ADC1D  // Digital input disable bit corresponding with PB2
+// 1.1V reference, left-adjust, ADC1/PB2
+//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
+// 1.1V reference, no left-adjust, ADC1/PB2
+#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
+#endif
+#define ADC_PRSCL   0x06    // clk/64
+
+// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
+#ifndef ADC_44
+#define ADC_44 234
+#endif
+#ifndef ADC_22
+#define ADC_22 117
+#endif
+
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+#define LAYOUT_DEFINED
+
+#endif