converted Wurkkos TS25 build...

... and gave it a smoother ramp
... and the other new functions added recently

3 files changed, 228 insertions, 116 deletions

diff --git a/hwdef-Wurkkos_TS25.h b/hwdef-Wurkkos_TS25.h
deleted file mode 100644
index cf34754..0000000
--- a/hwdef-Wurkkos_TS25.h
+++ /dev/null
@@ -1,116 +0,0 @@
-// Wurkkos TS25 driver layout
-// Copyright (C) 2022-2023 (FIXME)
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- * Driver pinout:
- * eSwitch:    PA5
- * PWM FET:    PB0 (TCA0 WO0)
- * PWM 1x7135: PB1 (TCA0 WO1)
- * Voltage:    VCC
- * Aux Blue:   PC1
- * Aux Red:    PC2
- * Aux Green:  PC3
- */
-
-#define LAYOUT_DEFINED
-
-#ifdef ATTINY
-#undef ATTINY
-#endif
-#define ATTINY 1616
-#include <avr/io.h>
-
-#define PWM_CHANNELS 2
-#define PWM_BITS 16
-#define PWM_TOP 255
-#define USE_DYN_PWM
-
-#ifndef SWITCH_PIN
-#define SWITCH_PIN     PIN5_bp
-#define SWITCH_PORT    VPORTA.IN
-#define SWITCH_ISC_REG PORTA.PIN2CTRL
-#define SWITCH_VECT    PORTA_PORT_vect
-#define SWITCH_INTFLG  VPORTA.INTFLAGS
-#endif
-
-
-// 7135 channel
-#ifndef PWM1_PIN
-#define PWM1_PIN PB1               //
-#define PWM1_LVL TCA0.SINGLE.CMP1BUF  // CMP1 is the output compare register for PB1
-#endif
-
-// FET channel
-#ifndef PWM2_PIN
-#define PWM2_PIN PB0               //
-#define PWM2_LVL TCA0.SINGLE.CMP0BUF  // CMP0 is the output compare register for PB0
-#endif
-
-// PWM parameters of both channels are tied together because they share a counter
-#define PWM1_TOP TCA0.SINGLE.PERBUF   // holds the TOP value for for variable-resolution PWM
-// not necessary when double-buffered "BUF" registers are used
-#define PWM1_CNT TCA0.SINGLE.CNT   // for resetting phase after each TOP adjustment
-#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
-#define PWM1_PHASE_RESET_ON   // force reset while turning on
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
-#endif
-
-
-// this driver allows for aux LEDs under the optic
-#define AUXLED_B_PIN    PIN1_bp    // pin 1
-#define AUXLED_R_PIN    PIN2_bp    // pin 2
-#define AUXLED_G_PIN    PIN3_bp    // pin 3
-#define AUXLED_RGB_PORT PORTC  // PORTA or PORTB or PORTC
-
-
-// with so many pins, doing this all with #ifdefs gets awkward...
-// ... so just hardcode it in each hwdef file instead
-inline void hwdef_setup() {
-
-    // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
-    _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
-
-    //VPORTA.DIR = ...;
-    VPORTB.DIR = PIN0_bm | PIN1_bm;  // Outputs: PWMs
-    VPORTC.DIR = PIN1_bm | PIN2_bm | PIN3_bm;
-
-    // enable pullups on the unused pins to reduce power
-    PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc;  // eSwitch
-    PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
-    PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
-
-    //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
-    //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
-    PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
-    PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
-    PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
-    PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
-
-    PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
-    //PORTC.PIN1CTRL = PORT_PULLUPEN_bm; // RGB Aux
-    //PORTC.PIN2CTRL = PORT_PULLUPEN_bm; // RGB Aux
-    //PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // RGB Aux
-
-    // set up the PWM
-    // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
-    // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
-    // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
-    // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
-    // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
-    // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
-    // See the manual for other pins, clocks, configs, portmux, etc
-    TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
-    PWM1_TOP = PWM_TOP;
-    TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
-}
-
diff --git a/hwdef-wurkkos-ts25.c b/hwdef-wurkkos-ts25.c
new file mode 100644
index 0000000..1d5b656
--- /dev/null
+++ b/hwdef-wurkkos-ts25.c
@@ -0,0 +1,49 @@
+// Wurkkos TS25 PWM helper functions
+// Copyright (C) 2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include "chan-rgbaux.c"
+
+// single set of LEDs with 2 stacked power channels, DDFET+1 or DDFET+linear
+void set_level_main(uint8_t level) {
+    if (level == 0) {
+        CH1_PWM = 0;
+        CH2_PWM = 0;
+        PWM_CNT = 0;  // reset phase
+        return;
+    }
+
+    level --;  // PWM array index = level - 1
+    PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+    PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+    // pulse frequency modulation, a.k.a. dynamic PWM
+    uint16_t top = PWM_GET16(pwm_tops, level);
+
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+    // wait to sync the counter and avoid flashes
+    // (unnecessary w/ buffered registers)
+    //while(actual_level && (PWM_CNT > (top - 32))) {}
+    PWM_TOP = top;
+    // force reset phase when turning on from zero
+    // (because otherwise the initial response is inconsistent)
+    if (! actual_level) PWM_CNT = 0;
+}
+
+bool gradual_tick_main(uint8_t gt) {
+    PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt);
+
+    GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT);
+    GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM);
+
+    if (   (pwm1 == CH1_PWM)
+        && (pwm2 == CH2_PWM)
+       ) {
+        return true;  // done
+    }
+    return false;  // not done yet
+}
+
diff --git a/hwdef-wurkkos-ts25.h b/hwdef-wurkkos-ts25.h
new file mode 100644
index 0000000..b9fbdfb
--- /dev/null
+++ b/hwdef-wurkkos-ts25.h
@@ -0,0 +1,179 @@
+// Wurkkos TS25 driver layout
+// Copyright (C) 2022-2023 (FIXME)
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ * Driver pinout:
+ * eSwitch:    PA5
+ * PWM FET:    PB0 (TCA0 WO0)
+ * PWM 1x7135: PB1 (TCA0 WO1)
+ * Voltage:    VCC
+ * Aux Red:    PC2
+ * Aux Green:  PC3
+ * Aux Blue:   PC1
+ */
+
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-wurkkos-ts25.c
+
+// allow using aux LEDs as extra channel modes
+#include "chan-rgbaux.h"
+
+#define USE_CHANNEL_MODES
+// channel modes:
+// * 0. FET+7135 stacked
+// * 1. aux red
+// * 2. aux yellow
+// * 3. aux green
+// * 4. aux cyan
+// * 5. aux blue
+// * 6. aux purple
+// * 7. aux white
+#define NUM_CHANNEL_MODES  8
+enum CHANNEL_MODES {
+    CM_MAIN = 0,
+    CM_AUXRED,
+    CM_AUXYEL,
+    CM_AUXGRN,
+    CM_AUXCYN,
+    CM_AUXBLU,
+    CM_AUXPRP,
+    CM_AUXWHT,
+};
+
+#define DEFAULT_CHANNEL_MODE  CM_MAIN
+
+#define CHANNEL_MODES_ENABLED 0b00000001
+#define CHANNEL_HAS_ARGS      0b00000000
+
+#define SET_LEVEL_MODES      set_level_main, \
+                             set_level_auxred, \
+                             set_level_auxyel, \
+                             set_level_auxgrn, \
+                             set_level_auxcyn, \
+                             set_level_auxblu, \
+                             set_level_auxprp, \
+                             set_level_auxwht
+// gradual ticking for thermal regulation
+#define GRADUAL_TICK_MODES   gradual_tick_main, \
+                             gradual_tick_null, \
+                             gradual_tick_null, \
+                             gradual_tick_null, \
+                             gradual_tick_null, \
+                             gradual_tick_null, \
+                             gradual_tick_null, \
+                             gradual_tick_null
+
+
+#define PWM_CHANNELS 2  // old, remove this
+
+#define PWM_BITS      16        // dynamic 16-bit, but never goes over 255
+#define PWM_GET       PWM_GET8
+#define PWM_DATATYPE  uint16_t  // is used for PWM_TOPS (which goes way over 255)
+#define PWM_DATATYPE2 uint16_t  // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint8_t   // 1x7135 ramp
+#define PWM2_DATATYPE uint8_t   // DD FET ramp
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP TCA0.SINGLE.PERBUF   // holds the TOP value for for variable-resolution PWM
+#define PWM_TOP_INIT  255    // highest value used in top half of ramp
+// not necessary when double-buffered "BUF" registers are used
+#define PWM_CNT TCA0.SINGLE.CNT   // for resetting phase after each TOP adjustment
+
+// 1x7135 channel
+#define CH1_PIN  PB1
+#define CH1_PWM  TCA0.SINGLE.CMP1BUF  // CMP1 is the output compare register for PB1
+
+// DD FET channel
+#define CH2_PIN  PB0
+#define CH2_PWM  TCA0.SINGLE.CMP0BUF  // CMP0 is the output compare register for PB0
+
+// e-switch
+#define SWITCH_PIN      PIN5_bp
+//#define SWITCH_PCINT    PCINT0
+#define SWITCH_PORT     VPORTA.IN
+#define SWITCH_ISC_REG  PORTA.PIN2CTRL
+#define SWITCH_VECT     PORTA_PORT_vect
+#define SWITCH_INTFLG   VPORTA.INTFLAGS
+//#define PCINT_vect      PCINT0_vect
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+// this driver allows for aux LEDs under the optic
+#define AUXLED_R_PIN    PIN2_bp    // pin 2
+#define AUXLED_G_PIN    PIN3_bp    // pin 3
+#define AUXLED_B_PIN    PIN1_bp    // pin 1
+#define AUXLED_RGB_PORT PORTC  // PORTA or PORTB or PORTC
+
+// this light has three aux LED channels: R, G, B
+#define USE_AUX_RGB_LEDS
+
+void set_level_main(uint8_t level);
+
+bool gradual_tick_main(uint8_t gt);
+
+
+inline void hwdef_setup() {
+
+    // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+    _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB,
+                      CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
+
+    //VPORTA.DIR = ...;
+    // Outputs: PWMs
+    VPORTB.DIR = PIN0_bm
+               | PIN1_bm;
+    // RGB aux LEDs
+    VPORTC.DIR = PIN1_bm
+               | PIN2_bm
+               | PIN3_bm;
+
+    // enable pullups on the unused pins to reduce power
+    PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc;  // eSwitch
+    PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+    //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
+    //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
+    PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+    PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
+    PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
+    PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
+
+    PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+    //PORTC.PIN1CTRL = PORT_PULLUPEN_bm; // RGB Aux
+    //PORTC.PIN2CTRL = PORT_PULLUPEN_bm; // RGB Aux
+    //PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // RGB Aux
+
+    // set up the PWM
+    // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+    // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+    // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+    // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+    // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+    // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+    // See the manual for other pins, clocks, configs, portmux, etc
+    TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm
+                      | TCA_SINGLE_CMP1EN_bm
+                      | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
+    TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc
+                      | TCA_SINGLE_ENABLE_bm;
+
+    PWM_TOP = PWM_TOP_INIT;
+
+}
+
+
+#define LAYOUT_DEFINED
+