diff options
| author | Selene ToyKeeper | 2023-04-29 01:19:42 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2023-04-29 01:19:42 -0600 |
| commit | 9765caab66ab628d763a5148efde80b3c3930b31 (patch) | |
| tree | 5ec21fdf9a521b0d72820540e81263efc3028da3 /hw | |
| parent | just a todo note for later (diff) | |
| download | anduril-9765caab66ab628d763a5148efde80b3c3930b31.tar.gz anduril-9765caab66ab628d763a5148efde80b3c3930b31.tar.bz2 anduril-9765caab66ab628d763a5148efde80b3c3930b31.zip | |
Noctigon KR4: updated to use new channel system
(also tweaked D4v2 build to match KR4 as much as possible)
(also added Extended Simple UI to Hank's config)
Diffstat (limited to '')
| -rw-r--r-- | hwdef-Noctigon_KR4.h | 161 | ||||
| -rw-r--r-- | hwdef-emisar-2ch.h | 115 | ||||
| -rw-r--r-- | hwdef-emisar-d4v2.h | 79 | ||||
| -rw-r--r-- | hwdef-noctigon-kr4.c | 51 | ||||
| -rw-r--r-- | hwdef-noctigon-kr4.h | 212 |
5 files changed, 360 insertions, 258 deletions
diff --git a/hwdef-Noctigon_KR4.h b/hwdef-Noctigon_KR4.h deleted file mode 100644 index 1c863cb..0000000 --- a/hwdef-Noctigon_KR4.h +++ /dev/null @@ -1,161 +0,0 @@ -// Noctigon KR4 / D4V2.5 driver layout (attiny1634) -// Copyright (C) 2020-2023 Selene ToyKeeper -// SPDX-License-Identifier: GPL-3.0-or-later -#pragma once - -/* - * Pin / Name / Function - * 1 PA6 FET PWM (direct drive) (PWM1B) - * 2 PA5 R: red aux LED (PWM0B) - * 3 PA4 G: green aux LED - * 4 PA3 B: blue aux LED - * 5 PA2 button LED (D4V2.5 only) - * 6 PA1 (none) - * 7 PA0 (none) - * 8 GND GND - * 9 VCC VCC - * 10 PC5 (none) - * 11 PC4 (none) - * 12 PC3 RESET - * 13 PC2 (none) - * 14 PC1 SCK - * 15 PC0 (none) PWM0A - * 16 PB3 main LED PWM (linear) (PWM1A) - * 17 PB2 MISO / e-switch (PCINT10) - * 18 PB1 MOSI / battery voltage (ADC6) - * 19 PB0 Opamp power - * 20 PA7 (none) - * ADC12 thermal sensor - * - * Main LED power uses one pin to turn the Opamp on/off, - * and one pin to control Opamp power level. - * Main brightness control uses the power level pin, with 4 kHz 10-bit PWM. - * The on/off pin is only used to turn the main LED on and off, - * not to change brightness. - * Some models also have a direct-drive FET for turbo. - */ - -#ifdef ATTINY -#undef ATTINY -#endif -#define ATTINY 1634 -#include <avr/io.h> - -#define PWM_CHANNELS 2 -#define PWM_BITS 16 // data type needs 16 bits, not 8 -#define PWM_TOP 255 // highest value used in top half of ramp -#define USE_DYN_PWM // dynamic frequency and speed - -#define SWITCH_PIN PB2 // pin 17 -#define SWITCH_PCINT PCINT10 // pin 17 pin change interrupt -#define SWITCH_PCIE PCIE1 // PCIE1 is for PCINT[11:8] -#define SWITCH_PCMSK PCMSK1 // PCMSK1 is for PCINT[11:8] -#define SWITCH_PORT PINB // PINA or PINB or PINC -#define PCINT_vect PCINT1_vect // ISR for PCINT[11:8] - -// the button tends to short out the voltage divider, -// so ignore voltage while the button is being held -//#define NO_LVP_WHILE_BUTTON_PRESSED - - -#define PWM1_PIN PB3 // pin 16, Opamp reference -#define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3 -#define PWM1_CNT TCNT1 // for dynamic PWM, reset phase -#define PWM1_PHASE_RESET_OFF // force reset while shutting off -#define PWM1_PHASE_RESET_ON // force reset while turning on -#define PWM1_PHASE_SYNC // manual sync while changing level - -#define PWM2_PIN PA6 // pin 1, DD FET PWM -#define PWM2_LVL OCR1B // OCR1B is the output compare register for PA6 - -// PWM parameters of both channels are tied together because they share a counter -#define PWM1_TOP ICR1 // holds the TOP value for for variable-resolution PWM - -#define LED_ENABLE_PIN PB0 // pin 19, Opamp power -#define LED_ENABLE_PORT PORTB // control port for PB0 - - -#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened -#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6 -// pin to ADC mappings are in DS table 19-4 -#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1 -// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6 -#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D -// DS tables 19-3, 19-4 -// Bit 7 6 5 4 3 2 1 0 -// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0 -// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1 -// divided by ... -// REFS[1:0] = 1, 0 for internal 1.1V reference -// other bits reserved -#define ADMUX_VOLTAGE_DIVIDER 0b10000110 -#define ADC_PRSCL 0x07 // clk/128 - -// Raw ADC readings at 4.4V and 2.2V -// calibrate the voltage readout here -// estimated / calculated values are: -// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1) -// D1, R1, R2 = 0, 330, 100 -#ifndef ADC_44 -//#define ADC_44 981 // raw value at 4.40V -#define ADC_44 967 // manually tweaked so 4.16V will blink out 4.2 -#endif -#ifndef ADC_22 -//#define ADC_22 489 // raw value at 2.20V -#define ADC_22 482 // manually tweaked so 4.16V will blink out 4.2 -#endif - -// this light has aux LEDs under the optic -#define AUXLED_R_PIN PA5 // pin 2 -#define AUXLED_G_PIN PA4 // pin 3 -#define AUXLED_B_PIN PA3 // pin 4 -#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC -#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC -#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC - -#define BUTTON_LED_PIN PA2 // pin 5 -#define BUTTON_LED_PORT PORTA // for all "PA" pins -#define BUTTON_LED_DDR DDRA // for all "PA" pins -#define BUTTON_LED_PUE PUEA // for all "PA" pins - -// with so many pins, doing this all with #ifdefs gets awkward... -// ... so just hardcode it in each hwdef file instead -inline void hwdef_setup() { - // enable output ports - // Opamp level and Opamp on/off - DDRB = (1 << PWM1_PIN) - | (1 << LED_ENABLE_PIN); - // DD FET PWM, aux R/G/B, button LED - DDRA = (1 << PWM2_PIN) - | (1 << AUXLED_R_PIN) - | (1 << AUXLED_G_PIN) - | (1 << AUXLED_B_PIN) - | (1 << BUTTON_LED_PIN) - ; - - // configure PWM - // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter - // pre-scale for timer: N = 1 - // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) - // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) - // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) - // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4) - TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5) - | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) - | (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) - ; - TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) - | (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5) - ; - - // set PWM resolution - PWM1_TOP = PWM_TOP; - - // set up e-switch - //PORTB = (1 << SWITCH_PIN); // TODO: configure PORTA / PORTB / PORTC? - PUEB = (1 << SWITCH_PIN); // pull-up for e-switch - SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt -} - -#define LAYOUT_DEFINED - diff --git a/hwdef-emisar-2ch.h b/hwdef-emisar-2ch.h index 8b0ffc0..9d1b185 100644 --- a/hwdef-emisar-2ch.h +++ b/hwdef-emisar-2ch.h @@ -28,11 +28,12 @@ * ADC12 thermal sensor */ -#define HWDEF_C_FILE hwdef-emisar-2ch.c - #define ATTINY 1634 #include <avr/io.h> +#define HWDEF_C_FILE hwdef-emisar-2ch.c + +#define USE_CHANNEL_MODES // channel modes: // * 0. channel 1 only // * 1. channel 2 only @@ -48,11 +49,10 @@ #define CHANNEL_MODES_ENABLED 0b00011111 #define CHANNEL_HAS_ARGS 0b00011000 +#define USE_CHANNEL_MODE_ARGS // _, _, _, 128=middle CCT, 0=warm-to-cool #define CHANNEL_MODE_ARGS 0,0,0,128,0 -#define USE_CHANNEL_MODES -#define USE_CHANNEL_MODE_ARGS #define SET_LEVEL_MODES set_level_ch1, \ set_level_ch2, \ set_level_both, \ @@ -70,7 +70,7 @@ #define PWM_CHANNELS 1 // old, remove this -#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz +#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz #define PWM_GET PWM_GET16 #define PWM_DATATYPE uint16_t #define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 @@ -80,7 +80,7 @@ // PWM parameters of both channels are tied together because they share a counter #define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM -#define PWM_TOP_INIT 511 +#define PWM_TOP_INIT 511 // highest value used in top half of ramp #define PWM_CNT TCNT1 // for dynamic PWM, reset phase #define CH1_PIN PB3 // pin 16, Opamp reference @@ -96,7 +96,7 @@ //#define CH3_PIN PC0 // pin 15, DD FET PWM //#define CH3_LVL OCR0A // OCR0A is the output compare register for PC0 - +// e-switch #ifndef SWITCH_PIN #define SWITCH_PIN PA7 // pin 20 #define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt @@ -164,59 +164,58 @@ bool gradual_tick_blend(uint8_t gt); bool gradual_tick_auto(uint8_t gt); -// with so many pins, doing this all with #ifdefs gets awkward... -// ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { - // enable output ports - //DDRC = (1 << CH3_PIN); - DDRB = (1 << CH1_PIN); - DDRA = (1 << CH2_PIN) - | (1 << AUXLED_R_PIN) - | (1 << AUXLED_G_PIN) - | (1 << AUXLED_B_PIN) - | (1 << BUTTON_LED_PIN) - | (1 << CH1_ENABLE_PIN) - | (1 << CH2_ENABLE_PIN) - ; - - // configure PWM - // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter - // pre-scale for timer: N = 1 - // Linear opamp PWM for both main and 2nd LEDs (10-bit) - // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) - // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) - // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) - // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4) - TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5) - | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) - | (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) - ; - TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) - | (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5) - ; - - // unused on this driver - // FET PWM (8-bit; this channel can't do 10-bit) - // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8) - // CS0[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 11-9) - // COM0A[1:0]: 1,0: PWM OC0A in the normal direction (DS table 11-4) - // COM0B[1:0]: 1,0: PWM OC0B in the normal direction (DS table 11-7) - //TCCR0A = (0<<WGM01) | (1<<WGM00) // 8-bit (TOP=0xFF) (DS table 11-8) - // | (1<<COM0A1) | (0<<COM0A0) // PWM 0A in normal direction (DS table 11-4) - // //| (1<<COM0B1) | (0<<COM0B0) // PWM 0B in normal direction (DS table 11-7) - // ; - //TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00) // clk/1 (no prescaling) (DS table 11-9) - // | (0<<WGM02) // phase-correct PWM (DS table 11-8) - // ; - //CH3_LVL = 0; // ensure this channel is off, if it exists - - // set PWM resolution - PWM_TOP = PWM_TOP_INIT; - - // set up e-switch - SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch - SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt + // enable output ports + //DDRC = (1 << CH3_PIN); + DDRB = (1 << CH1_PIN); + DDRA = (1 << CH2_PIN) + | (1 << AUXLED_R_PIN) + | (1 << AUXLED_G_PIN) + | (1 << AUXLED_B_PIN) + | (1 << BUTTON_LED_PIN) + | (1 << CH1_ENABLE_PIN) + | (1 << CH2_ENABLE_PIN) + ; + + // configure PWM + // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter + // pre-scale for timer: N = 1 + // Linear opamp PWM for both main and 2nd LEDs (10-bit) + // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) + // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) + // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) + // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4) + TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5) + | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) + | (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) + ; + TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) + | (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5) + ; + + // unused on this driver + // FET PWM (8-bit; this channel can't do 10-bit) + // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8) + // CS0[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 11-9) + // COM0A[1:0]: 1,0: PWM OC0A in the normal direction (DS table 11-4) + // COM0B[1:0]: 1,0: PWM OC0B in the normal direction (DS table 11-7) + //TCCR0A = (0<<WGM01) | (1<<WGM00) // 8-bit (TOP=0xFF) (DS table 11-8) + // | (1<<COM0A1) | (0<<COM0A0) // PWM 0A in normal direction (DS table 11-4) + // //| (1<<COM0B1) | (0<<COM0B0) // PWM 0B in normal direction (DS table 11-7) + // ; + //TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00) // clk/1 (no prescaling) (DS table 11-9) + // | (0<<WGM02) // phase-correct PWM (DS table 11-8) + // ; + //CH3_LVL = 0; // ensure this channel is off, if it exists + + // set PWM resolution + PWM_TOP = PWM_TOP_INIT; + + // set up e-switch + SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch + SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt } + #define LAYOUT_DEFINED diff --git a/hwdef-emisar-d4v2.h b/hwdef-emisar-d4v2.h index 96d4052..aeb5b0d 100644 --- a/hwdef-emisar-d4v2.h +++ b/hwdef-emisar-d4v2.h @@ -5,10 +5,10 @@ /* * Pin / Name / Function - * 1 PA6 FET PWM (PWM1B) - * 2 PA5 red aux LED (PWM0B) - * 3 PA4 green aux LED - * 4 PA3 blue aux LED + * 1 PA6 FET PWM (direct drive) (PWM1B) + * 2 PA5 R: red aux LED (PWM0B) + * 3 PA4 G: green aux LED + * 4 PA3 B: blue aux LED * 5 PA2 e-switch * 6 PA1 button LED * 7 PA0 (none) @@ -36,6 +36,7 @@ // allow using aux LEDs as extra channel modes #include "chan-rgbaux.h" +#define USE_CHANNEL_MODES // channel modes: // * 0. FET+7135 stacked // * 1. aux red @@ -47,51 +48,56 @@ #define CM_AUXGRN 2 #define CM_AUXBLU 3 -#define DEFAULT_CHANNEL_MODE 0 +#define DEFAULT_CHANNEL_MODE CM_MAIN #define CHANNEL_MODES_ENABLED 0b00000001 #define CHANNEL_HAS_ARGS 0b00000000 -// _, _, _, 128=middle CCT, 0=warm-to-cool +// no args +//#define USE_CHANNEL_MODE_ARGS //#define CHANNEL_MODE_ARGS 0,0,0,0 -#define USE_CHANNEL_MODES -//#define USE_CHANNEL_MODE_ARGS -#define SET_LEVEL_MODES set_level_stacked, \ +#define SET_LEVEL_MODES set_level_main, \ set_level_auxred, \ set_level_auxgrn, \ set_level_auxblu // gradual ticking for thermal regulation -#define GRADUAL_TICK_MODES gradual_tick_stacked, \ +#define GRADUAL_TICK_MODES gradual_tick_main, \ gradual_tick_null, \ gradual_tick_null, \ gradual_tick_null -// TODO: remove this when possible -#define PWM_CHANNELS 2 -#define SWITCH_PIN PA2 // pin 5 -#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt -#define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0] -#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0] -#define SWITCH_PORT PINA // PINA or PINB or PINC +#define PWM_CHANNELS 2 // old, remove this +#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz #define PWM_GET PWM_GET16 -#define PWM_BITS 16 #define PWM_DATATYPE uint16_t #define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 -#define PWM1_DATATYPE uint16_t -#define PWM2_DATATYPE uint16_t +#define PWM1_DATATYPE uint16_t // linear ramp +#define PWM2_DATATYPE uint16_t // DD FET ramp + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM +#define PWM_TOP_INIT 255 // highest value used in top half of ramp +#define PWM_CNT TCNT1 // for dynamic PWM, reset phase -// dynamic PWM -#define PWM_TOP_INIT 255 -#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM -#define PWM_CNT TCNT1 // for dynamic PWM, reset phase +// 1x7135 channel +#define CH1_PIN PB3 // pin 16, 1x7135 PWM +#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3 -#define LOW_PWM_PIN PB3 // pin 16, 1x7135 PWM -#define LOW_PWM_LVL OCR1A // OCR1A is the output compare register for PB3 +// DD FET channel +#define CH2_PIN PA6 // pin 1, DD FET PWM +#define CH2_PWM OCR1B // OCR1B is the output compare register for PB1 + +// e-switch +#define SWITCH_PIN PA2 // pin 5 +#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt +#define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0] +#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0] +#define SWITCH_PORT PINA // PINA or PINB or PINC +#define SWITCH_PUE PUEA // pullup group A +#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0] -#define HIGH_PWM_PIN PA6 // pin 1, FET PWM -#define HIGH_PWM_LVL OCR1B // OCR1B is the output compare register for PB1 #define ADC_PRSCL 0x07 // clk/128 @@ -118,24 +124,21 @@ // it also has an independent LED in the button #define USE_BUTTON_LED // the aux LEDs are front-facing, so turn them off while main LEDs are on -// TODO: the whole "indicator LED" thing needs to be refactored into -// "aux LED(s)" and "button LED(s)" since they work a bit differently #ifdef USE_INDICATOR_LED_WHILE_RAMPING #undef USE_INDICATOR_LED_WHILE_RAMPING #endif -// custom channel modes -void set_level_stacked(uint8_t level); +void set_level_main(uint8_t level); -bool gradual_tick_stacked(uint8_t gt); +bool gradual_tick_main(uint8_t gt); inline void hwdef_setup() { // enable output ports // 7135 - DDRB = (1 << LOW_PWM_PIN); - // FET, aux R/G/B, button LED - DDRA = (1 << HIGH_PWM_PIN) + DDRB = (1 << CH1_PIN); + // DD FET, aux R/G/B, button LED + DDRA = (1 << CH2_PIN) | (1 << AUXLED_R_PIN) | (1 << AUXLED_G_PIN) | (1 << AUXLED_B_PIN) @@ -145,7 +148,6 @@ inline void hwdef_setup() { // configure PWM // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter // pre-scale for timer: N = 1 - // Linear opamp PWM for both main and 2nd LEDs (10-bit) // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) @@ -175,8 +177,7 @@ inline void hwdef_setup() { #endif // set up e-switch - //PORTA = (1 << SWITCH_PIN); // TODO: configure PORTA / PORTB / PORTC? - PUEA = (1 << SWITCH_PIN); // pull-up for e-switch + SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt } diff --git a/hwdef-noctigon-kr4.c b/hwdef-noctigon-kr4.c new file mode 100644 index 0000000..bcb98fc --- /dev/null +++ b/hwdef-noctigon-kr4.c @@ -0,0 +1,51 @@ +// Noctigon KR4 PWM helper functions +// Copyright (C) 2020-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later + +#pragma once + +#include "chan-rgbaux.c" + +// single set of LEDs with 2 stacked power channels, linear + DD FET +void set_level_main(uint8_t level) { + if (level == 0) { + CH1_PWM = 0; + CH2_PWM = 0; + PWM_CNT = 0; // reset phase + CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN); // disable opamp + return; + } + + CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN); // enable opamp + + level --; // PWM array index = level - 1 + PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level); + PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level); + // pulse frequency modulation, a.k.a. dynamic PWM + uint16_t top = PWM_GET(pwm_tops, level); + + CH1_PWM = ch1_pwm; + CH2_PWM = ch2_pwm; + // wait to sync the counter and avoid flashes + while(actual_level && (PWM_CNT > (top - 32))) {} + PWM_TOP = top; + // force reset phase when turning on from zero + // (because otherwise the initial response is inconsistent) + if (! actual_level) PWM_CNT = 0; +} + +bool gradual_tick_main(uint8_t gt) { + PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt); + PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt); + + GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT); + GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM); + + if ( (pwm1 == CH1_PWM) + && (pwm2 == CH2_PWM) + ) { + return true; // done + } + return false; // not done yet +} + diff --git a/hwdef-noctigon-kr4.h b/hwdef-noctigon-kr4.h new file mode 100644 index 0000000..8caf262 --- /dev/null +++ b/hwdef-noctigon-kr4.h @@ -0,0 +1,212 @@ +// Noctigon KR4 / D4V2.5 driver layout (attiny1634) +// Copyright (C) 2020-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +/* + * Pin / Name / Function + * 1 PA6 FET PWM (direct drive) (PWM1B) + * 2 PA5 R: red aux LED (PWM0B) + * 3 PA4 G: green aux LED + * 4 PA3 B: blue aux LED + * 5 PA2 button LED (D4V2.5 only) + * 6 PA1 (none) + * 7 PA0 (none) + * 8 GND GND + * 9 VCC VCC + * 10 PC5 (none) + * 11 PC4 (none) + * 12 PC3 RESET + * 13 PC2 (none) + * 14 PC1 SCK + * 15 PC0 (none) PWM0A + * 16 PB3 main LED PWM (linear) (PWM1A) + * 17 PB2 MISO / e-switch (PCINT10) + * 18 PB1 MOSI / battery voltage (ADC6) + * 19 PB0 Opamp power + * 20 PA7 (none) + * ADC12 thermal sensor + * + * Main LED power uses one pin to turn the Opamp on/off, + * and one pin to control Opamp power level. + * The on/off pin is only used to turn the main LED on and off, + * not to change brightness. + * Some models also have a direct-drive FET for turbo. + */ + +#define ATTINY 1634 +#include <avr/io.h> + +#define HWDEF_C_FILE hwdef-noctigon-kr4.c + +// allow using aux LEDs as extra channel modes +#include "chan-rgbaux.h" + +#define USE_CHANNEL_MODES +// channel modes: +// * 0. linear + DD FET stacked +// * 1. aux red +// * 2. aux green +// * 3. aux blue +#define NUM_CHANNEL_MODES 4 +#define CM_MAIN 0 +#define CM_AUXRED 1 +#define CM_AUXGRN 2 +#define CM_AUXBLU 3 + +#define DEFAULT_CHANNEL_MODE CM_MAIN + +#define CHANNEL_MODES_ENABLED 0b00000001 +#define CHANNEL_HAS_ARGS 0b00000000 +// no args +//#define USE_CHANNEL_MODE_ARGS +//#define CHANNEL_MODE_ARGS 0,0,0,0 + +#define SET_LEVEL_MODES set_level_main, \ + set_level_auxred, \ + set_level_auxgrn, \ + set_level_auxblu +// gradual ticking for thermal regulation +#define GRADUAL_TICK_MODES gradual_tick_main, \ + gradual_tick_null, \ + gradual_tick_null, \ + gradual_tick_null + + +#define PWM_CHANNELS 2 // old, remove this + +#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz +#define PWM_GET PWM_GET16 +#define PWM_DATATYPE uint16_t +#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint16_t // linear ramp +#define PWM2_DATATYPE uint16_t // DD FET ramp + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM +#define PWM_TOP_INIT 255 // highest value used in top half of ramp +#define PWM_CNT TCNT1 // for dynamic PWM, reset phase + +// linear channel +#define CH1_PIN PB3 // pin 16, Opamp reference +#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3 +#define CH1_ENABLE_PIN PB0 // pin 19, Opamp power +#define CH1_ENABLE_PORT PORTB // control port for PB0 +// TODO: remove these +#define PWM1_PHASE_RESET_OFF // force reset while shutting off +#define PWM1_PHASE_RESET_ON // force reset while turning on +#define PWM1_PHASE_SYNC // manual sync while changing level + +// DD FET channel +#define CH2_PIN PA6 // pin 1, DD FET PWM +#define CH2_PWM OCR1B // OCR1B is the output compare register for PA6 + +// e-switch +#define SWITCH_PIN PB2 // pin 17 +#define SWITCH_PCINT PCINT10 // pin 17 pin change interrupt +#define SWITCH_PCIE PCIE1 // PCIE1 is for PCINT[11:8] +#define SWITCH_PCMSK PCMSK1 // PCMSK1 is for PCINT[11:8] +#define SWITCH_PORT PINB // PINA or PINB or PINC +#define SWITCH_PUE PUEB // pullup group B +#define PCINT_vect PCINT1_vect // ISR for PCINT[11:8] + +// the button tends to short out the voltage divider, +// so ignore voltage while the button is being held +//#define NO_LVP_WHILE_BUTTON_PRESSED + +#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened +#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6 +// pin to ADC mappings are in DS table 19-4 +#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1 +// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6 +#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D +// DS tables 19-3, 19-4 +// Bit 7 6 5 4 3 2 1 0 +// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0 +// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1 +// divided by ... +// REFS[1:0] = 1, 0 for internal 1.1V reference +// other bits reserved +#define ADMUX_VOLTAGE_DIVIDER 0b10000110 +#define ADC_PRSCL 0x07 // clk/128 + +// Raw ADC readings at 4.4V and 2.2V +// calibrate the voltage readout here +// estimated / calculated values are: +// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1) +// D1, R1, R2 = 0, 330, 100 +#ifndef ADC_44 +//#define ADC_44 981 // raw value at 4.40V +#define ADC_44 967 // manually tweaked so 4.16V will blink out 4.2 +#endif +#ifndef ADC_22 +//#define ADC_22 489 // raw value at 2.20V +#define ADC_22 482 // manually tweaked so 4.16V will blink out 4.2 +#endif + +// this light has aux LEDs under the optic +#define AUXLED_R_PIN PA5 // pin 2 +#define AUXLED_G_PIN PA4 // pin 3 +#define AUXLED_B_PIN PA3 // pin 4 +#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC +#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC +#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC + +#define BUTTON_LED_PIN PA2 // pin 5 +#define BUTTON_LED_PORT PORTA // for all "PA" pins +#define BUTTON_LED_DDR DDRA // for all "PA" pins +#define BUTTON_LED_PUE PUEA // for all "PA" pins + +// this light has three aux LED channels: R, G, B +#define USE_AUX_RGB_LEDS +// some variants also have an independent LED in the button +#define USE_BUTTON_LED +// the aux LEDs are front-facing, so turn them off while main LEDs are on +#ifdef USE_INDICATOR_LED_WHILE_RAMPING +#undef USE_INDICATOR_LED_WHILE_RAMPING +#endif + +void set_level_main(uint8_t level); + +bool gradual_tick_main(uint8_t gt); + + +inline void hwdef_setup() { + // enable output ports + // Opamp level and Opamp on/off + DDRB = (1 << CH1_PIN) + | (1 << CH1_ENABLE_PIN); + // DD FET PWM, aux R/G/B, button LED + DDRA = (1 << CH2_PIN) + | (1 << AUXLED_R_PIN) + | (1 << AUXLED_G_PIN) + | (1 << AUXLED_B_PIN) + | (1 << BUTTON_LED_PIN) + ; + + // configure PWM + // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter + // pre-scale for timer: N = 1 + // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) + // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) + // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) + // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4) + TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5) + | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) + | (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) + ; + TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) + | (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5) + ; + + // set PWM resolution + PWM_TOP = PWM_TOP_INIT; + + // set up e-switch + SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch + SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt +} + + +#define LAYOUT_DEFINED + |
