Merge TK changes thru rev 623 (2021-09-17)

4 files changed, 345 insertions, 1 deletions

diff --git a/hwdef-BLF_LT1-t1616.h b/hwdef-BLF_LT1-t1616.h
new file mode 100644
index 0000000..8e5c58b
--- /dev/null
+++ b/hwdef-BLF_LT1-t1616.h
@@ -0,0 +1,107 @@
+#ifndef HWDEF_BLF_LANTERN_T1616_H
+#define HWDEF_BLF_LANTERN_T1616_H
+
+/* BLF LT1 driver layout using the Attiny1616
+
+Driver pinout:
+ * eSwitch:    PA5
+ * Aux LED:    PB5
+ * PWM FET:    PB0 (TCA0 WO0)
+ * PWM 1x7135: PB1 (TCA0 WO1)
+ * Voltage:    VCC
+
+*/
+
+
+#define LAYOUT_DEFINED
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define PWM_CHANNELS 1
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN     PIN5_bp
+#define SWITCH_PORT    VPORTA.IN
+#define SWITCH_ISC_REG PORTA.PIN2CTRL
+#define SWITCH_VECT    PORTA_PORT_vect
+#define SWITCH_INTFLG  VPORTA.INTFLAGS
+#endif
+
+
+// usually PWM1_LVL would be a hardware register, but we need to abstract
+// it out to a soft brightness value, in order to handle tint ramping
+// (this allows smooth thermal regulation to work, and makes things
+//  otherwise simpler and easier)
+uint8_t PWM1_LVL;
+
+// warm tint channel
+#ifndef PWM1_PIN
+#define PWM1_PIN PB1                //
+#define TINT1_LVL TCA0.SINGLE.CMP1  // CMP1 is the output compare register for PB1
+#endif
+
+// cold tint channel
+#ifndef PWM2_PIN
+#define PWM2_PIN PB0                //
+#define TINT2_LVL TCA0.SINGLE.CMP0  // CMP0 is the output compare register for PB0
+#endif
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN  PIN5_bp
+#define AUXLED_PORT PORTB
+#endif
+
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+
+    // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
+    _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+
+    //VPORTA.DIR = ...;
+    VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm;  // Outputs: Aux LED and PWMs
+    //VPORTC.DIR = ...;
+
+    // enable pullups on the unused pins to reduce power
+    PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc;  // eSwitch
+    PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+    PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+    //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // cold tint channel
+    //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // warm tint channel
+    PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+    PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
+    PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
+    //PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Aux LED
+
+    PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+    PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
+    PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
+    PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
+
+    // set up the PWM
+    // TODO: add references to MCU documentation
+    TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+    TCA0.SINGLE.PER = 255;
+    TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
+}
+
+
+#endif
diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h
new file mode 100644
index 0000000..d0c2821
--- /dev/null
+++ b/hwdef-BLF_LT1.h
@@ -0,0 +1,55 @@
+#ifndef HWDEF_BLF_LT1_H
+#define HWDEF_BLF_LT1_H
+
+/* BLF LT1 driver layout
+ *           ----
+ *   Reset -|1  8|- VCC
+ * eswitch -|2  7|- (unused)
+ * aux LED -|3  6|- PWM (5000K)
+ *     GND -|4  5|- PWM (3000K)
+ *           ----
+ */
+
+#define ATTINY 85
+#include <avr/io.h>
+
+#define PWM_CHANNELS 1  // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs)
+#define PWM_BITS 8      // 0 to 255 at 15.6 kHz
+#define PWM_TOP 255
+
+// dynamic PWM with tint ramping (not supported on attiny85)
+//#define USE_DYN_PWM     // dynamic frequency and speed
+//#define PWM1_CNT TCNT0  // for dynamic PWM, reset phase
+
+// usually PWM1_LVL would be a hardware register, but we need to abstract
+// it out to a soft brightness value, in order to handle tint ramping
+// (this allows smooth thermal regulation to work, and makes things
+//  otherwise simpler and easier)
+uint8_t PWM1_LVL;
+
+#define PWM1_PIN PB0        // pin 5, warm tint PWM
+#define TINT1_LVL OCR0A     // OCR0A is the output compare register for PB0
+
+#define PWM2_PIN PB1        // pin 6, cold tint PWM
+#define TINT2_LVL OCR0B     // OCR0B is the output compare register for PB1
+
+
+#define AUXLED_PIN   PB4    // pin 3
+
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+#define ADC_PRSCL   0x07    // clk/128
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+#define LAYOUT_DEFINED
+
+
+#endif
diff --git a/hwdef-Emisar_D4Sv2-tintramp.h b/hwdef-Emisar_D4Sv2-tintramp.h
new file mode 100644
index 0000000..76f6097
--- /dev/null
+++ b/hwdef-Emisar_D4Sv2-tintramp.h
@@ -0,0 +1,182 @@
+#ifndef HWDEF_D4SV2_TINTRAMP_H
+#define HWDEF_D4SV2_TINTRAMP_H
+
+/* Emisar D4Sv2 w/ tint ramping
+ * (based on the Noctigon K9.3 driver layout (attiny1634))
+ *
+ * Pin / Name / Function
+ *   1    PA6   2nd LED PWM (linear) (PWM1B)
+ *   2    PA5   R: red aux LED (PWM0B)
+ *   3    PA4   G: green aux LED
+ *   4    PA3   B: blue aux LED
+ *   5    PA2   button LED
+ *   6    PA1   Opamp 2 enable (2nd LEDs)
+ *   7    PA0   Opamp 1 enable (main LEDs)
+ *   8    GND   GND
+ *   9    VCC   VCC
+ *  10    PC5   (none)
+ *  11    PC4   (none)
+ *  12    PC3   RESET
+ *  13    PC2   (none)
+ *  14    PC1   SCK
+ *  15    PC0   main LED PWM (FET) (PWM0A) (unused on some models because tint ramping)
+ *  16    PB3   main LED PWM (linear) (PWM1A)
+ *  17    PB2   MISO
+ *  18    PB1   MOSI / battery voltage (ADC6)
+ *  19    PB0   (none)
+ *  20    PA7   e-switch (PCINT7)
+ *      ADC12   thermal sensor
+ *
+ * Main LED power uses one pin to turn the Opamp on/off,
+ * and one pin to control Opamp power level.
+ * Main brightness control uses the power level pin, with 4 kHz 10-bit PWM.
+ * The on/off pin is only used to turn the main LED on and off,
+ * not to change brightness.
+ */
+
+#ifdef ATTINY
+#undef ATTINY
+#endif
+#define ATTINY 1634
+#include <avr/io.h>
+
+#define PWM_CHANNELS 1  // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs)
+#define PWM_BITS 14     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
+#define PWM_TOP 511
+// dynamic PWM with tint ramping
+#define USE_DYN_PWM  // dynamic frequency and speed
+#define PWM_DATATYPE2 uint32_t  // only needs 32-bit if ramp values go over 255
+
+#define SWITCH_PIN   PA7     // pin 20
+#define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
+#define SWITCH_PCIE  PCIE0   // PCIE1 is for PCINT[7:0]
+#define SWITCH_PCMSK PCMSK0  // PCMSK1 is for PCINT[7:0]
+#define SWITCH_PORT  PINA    // PINA or PINB or PINC
+#define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
+
+// usually PWM1_LVL would be a hardware register, but we need to abstract
+// it out to a soft brightness value, in order to handle tint ramping
+// (this allows smooth thermal regulation to work, and makes things
+//  otherwise simpler and easier)
+uint16_t PWM1_LVL;
+#define PWM1_PIN PB3        // pin 16, Opamp reference
+#define TINT1_LVL OCR1A     // OCR1A is the output compare register for PB3
+#define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+
+// gah, this driver is weird...
+// two linear channels are treated as one,
+// while there's also a FET on one channel for turbo on half the LEDs
+// so the FET needs to be "PWM2" but the second linear is "TINT2"
+#define PWM3_PIN PA6        // pin 1, 2nd LED Opamp reference
+#define TINT2_LVL OCR1B     // OCR1B is the output compare register for PA6
+
+#define PWM2_PIN PC0        // pin 15, DD FET PWM
+#define PWM2_LVL OCR0A      // OCR0A is the output compare register for PC0
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM1_TOP ICR1       // holds the TOP value for for variable-resolution PWM
+
+#define LED_ENABLE_PIN  PA0    // pin 7, Opamp power
+#define LED_ENABLE_PORT PORTA  // control port for PA0
+
+#define LED2_ENABLE_PIN  PA1    // pin 6, Opamp power
+#define LED2_ENABLE_PORT PORTA  // control port for PA1
+
+
+#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
+#define VOLTAGE_PIN PB1      // Pin 18 / PB1 / ADC6
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC      ADC6D  // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC6D
+// DS tables 19-3, 19-4
+// Bit   7     6     5      4     3    2    1    0
+//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
+// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
+// divided by ...
+// REFS[1:0] = 1, 0 for internal 1.1V reference
+// other bits reserved
+#define ADMUX_VOLTAGE_DIVIDER 0b10000110
+#define ADC_PRSCL   0x07    // clk/128
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+//   (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
+// D1, R1, R2 = 0, 330, 100
+#ifndef ADC_44
+//#define ADC_44 981  // raw value at 4.40V
+#define ADC_44 967  // manually tweaked so 4.16V will blink out 4.2
+#endif
+#ifndef ADC_22
+//#define ADC_22 489  // raw value at 2.20V
+#define ADC_22 482  // manually tweaked so 4.16V will blink out 4.2
+#endif
+
+// this light has aux LEDs under the optic
+#define AUXLED_R_PIN    PA5    // pin 2
+#define AUXLED_G_PIN    PA4    // pin 3
+#define AUXLED_B_PIN    PA3    // pin 4
+#define AUXLED_RGB_PORT PORTA  // PORTA or PORTB or PORTC
+#define AUXLED_RGB_DDR  DDRA   // DDRA or DDRB or DDRC
+#define AUXLED_RGB_PUE  PUEA   // PUEA or PUEB or PUEC
+
+#define BUTTON_LED_PIN  PA2    // pin 5
+#define BUTTON_LED_PORT PORTA  // for all "PA" pins
+#define BUTTON_LED_DDR  DDRA   // for all "PA" pins
+#define BUTTON_LED_PUE  PUEA   // for all "PA" pins
+
+// with so many pins, doing this all with #ifdefs gets awkward...
+// ... so just hardcode it in each hwdef file instead
+inline void hwdef_setup() {
+  // enable output ports
+  DDRC = (1 << PWM2_PIN);
+  DDRB = (1 << PWM1_PIN);
+  DDRA = (1 << PWM3_PIN)
+       | (1 << AUXLED_R_PIN)
+       | (1 << AUXLED_G_PIN)
+       | (1 << AUXLED_B_PIN)
+       | (1 << BUTTON_LED_PIN)
+       | (1 << LED_ENABLE_PIN)
+       | (1 << LED2_ENABLE_PIN)
+       ;
+
+  // configure PWM
+  // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
+  // pre-scale for timer: N = 1
+  // Linear opamp PWM for both main and 2nd LEDs (10-bit)
+  // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
+  // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
+  // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
+  // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
+  TCCR1A  = (1<<WGM11)  | (0<<WGM10)   // adjustable PWM (TOP=ICR1) (DS table 12-5)
+          | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
+          | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
+          ;
+  TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
+          | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
+          ;
+
+  // FET PWM (8-bit; this channel can't do 10-bit)
+  // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
+  // CS0[2:0]:  0,0,1: clk/1 (No prescaling) (DS table 11-9)
+  // COM0A[1:0]:  1,0: PWM OC0A in the normal direction (DS table 11-4)
+  // COM0B[1:0]:  1,0: PWM OC0B in the normal direction (DS table 11-7)
+  TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
+          | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
+          //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
+          ;
+  TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
+          | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
+          ;
+  // set PWM resolution
+  PWM1_TOP = PWM_TOP;
+
+  // set up e-switch
+  PUEA = (1 << SWITCH_PIN);  // pull-up for e-switch
+  SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
+}
+
+#define LAYOUT_DEFINED
+
+#endif
diff --git a/hwdef-Noctigon_KR4.h b/hwdef-Noctigon_KR4.h
index eee4e08..75dd4c6 100644
--- a/hwdef-Noctigon_KR4.h
+++ b/hwdef-Noctigon_KR4.h
@@ -132,7 +132,7 @@ inline void hwdef_setup() {
   // configure PWM
   // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
   // pre-scale for timer: N = 1
-  // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
+  // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
   // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
   // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
   // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)