merged sp10-pro shutoff fix and mt35-mini support

10 files changed, 91 insertions, 3 deletions

diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h
index 16e1c90..4e81c42 100644
--- a/hwdef-BLF_LT1.h
+++ b/hwdef-BLF_LT1.h
@@ -20,6 +20,9 @@
 // dynamic PWM with tint ramping (not supported on attiny85)
 //#define USE_DYN_PWM     // dynamic frequency and speed
 //#define PWM1_CNT TCNT0  // for dynamic PWM, reset phase
+//#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+//#define PWM1_PHASE_RESET_ON   // force reset while turning on
+//#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 // usually PWM1_LVL would be a hardware register, but we need to abstract
 // it out to a soft brightness value, in order to handle tint ramping
diff --git a/hwdef-Emisar_D4Sv2-tintramp.h b/hwdef-Emisar_D4Sv2-tintramp.h
index 90545f4..0f4a77a 100644
--- a/hwdef-Emisar_D4Sv2-tintramp.h
+++ b/hwdef-Emisar_D4Sv2-tintramp.h
@@ -65,6 +65,9 @@ uint16_t PWM1_LVL;
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define TINT1_LVL OCR1A     // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 // gah, this driver is weird...
 // two linear channels are treated as one,
diff --git a/hwdef-Mateminco_MT35-Mini.h b/hwdef-Mateminco_MT35-Mini.h
new file mode 100644
index 0000000..344f658
--- /dev/null
+++ b/hwdef-Mateminco_MT35-Mini.h
@@ -0,0 +1,47 @@
+#ifndef HWDEF_MT35_MINI_H
+#define HWDEF_MT35_MINI_H
+
+/* Mateminco MT35-Mini / Astrolux FT03
+ *           ----
+ *   Reset -|1  8|- VCC
+ * eswitch -|2  7|- Aux LED
+ *  1x7135 -|3  6|- NC
+ *     GND -|4  5|- FET
+ *           ----
+ */
+
+#define PWM_CHANNELS 2
+
+#ifndef SWITCH_PIN
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
+
+#ifndef PWM1_PIN
+#define PWM1_PIN PB4        // pin 3, 1x7135 PWM
+#define PWM1_LVL OCR1B      // OCR1B is the output compare register for PB0
+#endif
+
+#ifndef PWM2_PIN
+#define PWM2_PIN PB0        // pin 5, FET PWM
+#define PWM2_LVL OCR0A      // OCR0A is the output compare register for PB4
+#endif
+
+#define ADC_PRSCL   0x07    // clk/128
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
+#endif
+
+// lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN   PB2    // pin 7
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+#define LAYOUT_DEFINED
+
+#endif
diff --git a/hwdef-Noctigon_DM11-12V.h b/hwdef-Noctigon_DM11-12V.h
index bd24768..a0d9715 100644
--- a/hwdef-Noctigon_DM11-12V.h
+++ b/hwdef-Noctigon_DM11-12V.h
@@ -61,6 +61,9 @@
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 // PWM parameters of both channels are tied together because they share a counter
 #define PWM1_TOP ICR1       // holds the TOP value for for variable-resolution PWM
diff --git a/hwdef-Noctigon_DM11-SBT90.h b/hwdef-Noctigon_DM11-SBT90.h
index 64ebe05..8d7aa3d 100644
--- a/hwdef-Noctigon_DM11-SBT90.h
+++ b/hwdef-Noctigon_DM11-SBT90.h
@@ -56,6 +56,9 @@
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 #define PWM2_PIN PA6        // pin 1, DD FET PWM
 #define PWM2_LVL OCR1B      // OCR1B is the output compare register for PA6
diff --git a/hwdef-Noctigon_DM11.h b/hwdef-Noctigon_DM11.h
index 19532e9..ea51432 100644
--- a/hwdef-Noctigon_DM11.h
+++ b/hwdef-Noctigon_DM11.h
@@ -55,6 +55,9 @@
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 #define PWM2_PIN PA6        // pin 1, DD FET PWM
 #define PWM2_LVL OCR1B      // OCR1B is the output compare register for PA6
diff --git a/hwdef-Noctigon_KR4-12V.h b/hwdef-Noctigon_KR4-12V.h
index 20724a2..e6cf18a 100644
--- a/hwdef-Noctigon_KR4-12V.h
+++ b/hwdef-Noctigon_KR4-12V.h
@@ -55,6 +55,9 @@
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 // PWM parameters of both channels are tied together because they share a counter
 #define PWM1_TOP ICR1       // holds the TOP value for for variable-resolution PWM
diff --git a/hwdef-Noctigon_KR4.h b/hwdef-Noctigon_KR4.h
index 75dd4c6..487d3ac 100644
--- a/hwdef-Noctigon_KR4.h
+++ b/hwdef-Noctigon_KR4.h
@@ -60,6 +60,9 @@
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
 #define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 #define PWM2_PIN PA6        // pin 1, DD FET PWM
 #define PWM2_LVL OCR1B      // OCR1B is the output compare register for PA6
diff --git a/hwdef-Sofirn_SP10-Pro.h b/hwdef-Sofirn_SP10-Pro.h
index bb10f2f..d7c2081 100644
--- a/hwdef-Sofirn_SP10-Pro.h
+++ b/hwdef-Sofirn_SP10-Pro.h
@@ -49,13 +49,17 @@ PA1 : Boost Enable
 // PWM parameters of both channels are tied together because they share a counter
 #define PWM1_TOP TCA0.SINGLE.PERBUF   // holds the TOP value for for variable-resolution PWM
 // not necessary when double-buffered "BUF" registers are used
-//#define PWM1_CNT TCA0.SINGLE.CNT   // for resetting phase after each TOP adjustment
+#define PWM1_CNT TCA0.SINGLE.CNT   // for resetting phase after each TOP adjustment
+#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
+#define PWM1_PHASE_RESET_ON   // force reset while turning on
+//#define PWM1_PHASE_SYNC       // manual sync while changing level
 
 #define LED_ENABLE_PIN   PIN1_bp
 #define LED_ENABLE_PORT  PORTA_OUT
+//#define LED_OFF_DELAY 4  // only needed when PWM1_PHASE_RESET_OFF not used
 
 #define USE_VOLTAGE_DIVIDER       // use a dedicated pin, not VCC, because VCC input is flattened
-#define DUAL_VOLTAGE_FLOOR    20  // for AA/14500 boost drivers, don't indicate low voltage if below this level
+#define DUAL_VOLTAGE_FLOOR    21  // for AA/14500 boost drivers, don't indicate low voltage if below this level
 #define DUAL_VOLTAGE_LOW_LOW   7  // the lower voltage range's danger zone 0.7 volts (NiMH)
 #define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc  // which ADC channel to read
 
@@ -121,4 +125,20 @@ inline void hwdef_setup() {
 }
 
 
+// set fuses, these carry over to the ELF file
+// we need this for enabling BOD in Active Mode from the factory.
+// settings can be verified / dumped from the ELF file using this
+// command: avr-objdump -d -S -j .fuse anduril.elf
+FUSES = {
+    .WDTCFG  = FUSE_WDTCFG_DEFAULT,   // Watchdog Configuration
+    .BODCFG  = FUSE_ACTIVE0_bm,       // BOD Configuration
+    .OSCCFG  = FUSE_OSCCFG_DEFAULT,   // Oscillator Configuration
+    .TCD0CFG = FUSE_TCD0CFG_DEFAULT,  // TCD0 Configuration
+    .SYSCFG0 = FUSE_SYSCFG0_DEFAULT,  // System Configuration 0
+    .SYSCFG1 = FUSE_SYSCFG1_DEFAULT,  // System Configuration 1
+    .APPEND  = FUSE_APPEND_DEFAULT,   // Application Code Section End
+    .BOOTEND = FUSE_BOOTEND_DEFAULT,  // Boot Section End
+};
+
+
 #endif
diff --git a/hwdef-thefreeman-lin16dac.h b/hwdef-thefreeman-lin16dac.h
index 0999c4c..9d6b145 100644
--- a/hwdef-thefreeman-lin16dac.h
+++ b/hwdef-thefreeman-lin16dac.h
@@ -47,7 +47,7 @@ Read voltage from VCC pin, has PFET so no drop
 // For turning on and off the op-amp
 #define LED2_ENABLE_PIN   PIN7_bp
 #define LED2_ENABLE_PORT  PORTA_OUT
-
+#define LED2_ON_DELAY 80  // how many ms to delay turning on the lights after enabling the channel
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR