converted all K9.3 builds and D4Sv2-tintramp-fet (now emisar-2ch-fet)

to multi-channel, and removed old K9.3 builds which aren't relevant any more,
and old D4Sv2-tintramp builds

5 files changed, 447 insertions, 363 deletions

diff --git a/hwdef-Emisar_D4Sv2-tintramp.h b/hwdef-Emisar_D4Sv2-tintramp.h
deleted file mode 100644
index 2709bc4..0000000
--- a/hwdef-Emisar_D4Sv2-tintramp.h
+++ /dev/null
@@ -1,189 +0,0 @@
-// Emisar D4Sv2 w/ tint ramping
-// Copyright (C) 2021-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- * (based on the Noctigon K9.3 driver layout (attiny1634))
- *
- * Pin / Name / Function
- *   1    PA6   2nd LED PWM (linear) (PWM1B)
- *   2    PA5   R: red aux LED (PWM0B)
- *   3    PA4   G: green aux LED
- *   4    PA3   B: blue aux LED
- *   5    PA2   button LED
- *   6    PA1   Opamp 2 enable (2nd LEDs)
- *   7    PA0   Opamp 1 enable (main LEDs)
- *   8    GND   GND
- *   9    VCC   VCC
- *  10    PC5   (none)
- *  11    PC4   (none)
- *  12    PC3   RESET
- *  13    PC2   (none)
- *  14    PC1   SCK
- *  15    PC0   main LED PWM (FET) (PWM0A) (unused on some models because tint ramping)
- *  16    PB3   main LED PWM (linear) (PWM1A)
- *  17    PB2   MISO
- *  18    PB1   MOSI / battery voltage (ADC6)
- *  19    PB0   (none)
- *  20    PA7   e-switch (PCINT7)
- *      ADC12   thermal sensor
- *
- * Main LED power uses one pin to turn the Opamp on/off,
- * and one pin to control Opamp power level.
- * Main brightness control uses the power level pin, with 4 kHz 10-bit PWM.
- * The on/off pin is only used to turn the main LED on and off,
- * not to change brightness.
- */
-
-#ifdef ATTINY
-#undef ATTINY
-#endif
-#define ATTINY 1634
-#include <avr/io.h>
-
-#define PWM_CHANNELS 1  // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs)
-#define PWM_BITS 14     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
-#define PWM_TOP 511
-// dynamic PWM with tint ramping
-#define USE_DYN_PWM  // dynamic frequency and speed
-#define PWM_DATATYPE2 uint32_t  // only needs 32-bit if ramp values go over 255
-
-#ifndef SWITCH_PIN
-#define SWITCH_PIN   PA7     // pin 20
-#define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
-#define SWITCH_PCIE  PCIE0   // PCIE1 is for PCINT[7:0]
-#define SWITCH_PCMSK PCMSK0  // PCMSK1 is for PCINT[7:0]
-#define SWITCH_PORT  PINA    // PINA or PINB or PINC
-#define SWITCH_PUE   PUEA    // pullup group A
-#define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
-#endif
-
-// usually PWM1_LVL would be a hardware register, but we need to abstract
-// it out to a soft brightness value, in order to handle tint ramping
-// (this allows smooth thermal regulation to work, and makes things
-//  otherwise simpler and easier)
-uint16_t PWM1_LVL;
-#define PWM1_PIN PB3        // pin 16, Opamp reference
-#define TINT1_LVL OCR1A     // OCR1A is the output compare register for PB3
-#define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
-#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
-#define PWM1_PHASE_RESET_ON   // force reset while turning on
-#define PWM1_PHASE_SYNC       // manual sync while changing level
-
-// gah, this driver is weird...
-// two linear channels are treated as one,
-// while there's also a FET on one channel for turbo on half the LEDs
-// so the FET needs to be "PWM2" but the second linear is "TINT2"
-#define PWM3_PIN PA6        // pin 1, 2nd LED Opamp reference
-#define TINT2_LVL OCR1B     // OCR1B is the output compare register for PA6
-
-#define PWM2_PIN PC0        // pin 15, DD FET PWM
-#define PWM2_LVL OCR0A      // OCR0A is the output compare register for PC0
-
-// PWM parameters of both channels are tied together because they share a counter
-#define PWM1_TOP ICR1       // holds the TOP value for for variable-resolution PWM
-
-#define LED_ENABLE_PIN  PA0    // pin 7, Opamp power
-#define LED_ENABLE_PORT PORTA  // control port for PA0
-
-#define LED2_ENABLE_PIN  PA1    // pin 6, Opamp power
-#define LED2_ENABLE_PORT PORTA  // control port for PA1
-
-
-#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
-#define VOLTAGE_PIN PB1      // Pin 18 / PB1 / ADC6
-// pin to ADC mappings are in DS table 19-4
-#define VOLTAGE_ADC      ADC6D  // digital input disable pin for PB1
-// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
-#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC6D
-// DS tables 19-3, 19-4
-// Bit   7     6     5      4     3    2    1    0
-//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
-// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
-// divided by ...
-// REFS[1:0] = 1, 0 for internal 1.1V reference
-// other bits reserved
-#define ADMUX_VOLTAGE_DIVIDER 0b10000110
-#define ADC_PRSCL   0x07    // clk/128
-
-// Raw ADC readings at 4.4V and 2.2V
-// calibrate the voltage readout here
-// estimated / calculated values are:
-//   (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
-// D1, R1, R2 = 0, 330, 100
-#ifndef ADC_44
-//#define ADC_44 981  // raw value at 4.40V
-#define ADC_44 967  // manually tweaked so 4.16V will blink out 4.2
-#endif
-#ifndef ADC_22
-//#define ADC_22 489  // raw value at 2.20V
-#define ADC_22 482  // manually tweaked so 4.16V will blink out 4.2
-#endif
-
-// this light has aux LEDs under the optic
-#define AUXLED_R_PIN    PA5    // pin 2
-#define AUXLED_G_PIN    PA4    // pin 3
-#define AUXLED_B_PIN    PA3    // pin 4
-#define AUXLED_RGB_PORT PORTA  // PORTA or PORTB or PORTC
-#define AUXLED_RGB_DDR  DDRA   // DDRA or DDRB or DDRC
-#define AUXLED_RGB_PUE  PUEA   // PUEA or PUEB or PUEC
-
-#define BUTTON_LED_PIN  PA2    // pin 5
-#define BUTTON_LED_PORT PORTA  // for all "PA" pins
-#define BUTTON_LED_DDR  DDRA   // for all "PA" pins
-#define BUTTON_LED_PUE  PUEA   // for all "PA" pins
-
-// with so many pins, doing this all with #ifdefs gets awkward...
-// ... so just hardcode it in each hwdef file instead
-inline void hwdef_setup() {
-  // enable output ports
-  DDRC = (1 << PWM2_PIN);
-  DDRB = (1 << PWM1_PIN);
-  DDRA = (1 << PWM3_PIN)
-       | (1 << AUXLED_R_PIN)
-       | (1 << AUXLED_G_PIN)
-       | (1 << AUXLED_B_PIN)
-       | (1 << BUTTON_LED_PIN)
-       | (1 << LED_ENABLE_PIN)
-       | (1 << LED2_ENABLE_PIN)
-       ;
-
-  // configure PWM
-  // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
-  // pre-scale for timer: N = 1
-  // Linear opamp PWM for both main and 2nd LEDs (10-bit)
-  // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
-  // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
-  // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
-  // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
-  TCCR1A  = (1<<WGM11)  | (0<<WGM10)   // adjustable PWM (TOP=ICR1) (DS table 12-5)
-          | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
-          | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
-          ;
-  TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
-          | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
-          ;
-
-  // FET PWM (8-bit; this channel can't do 10-bit)
-  // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
-  // CS0[2:0]:  0,0,1: clk/1 (No prescaling) (DS table 11-9)
-  // COM0A[1:0]:  1,0: PWM OC0A in the normal direction (DS table 11-4)
-  // COM0B[1:0]:  1,0: PWM OC0B in the normal direction (DS table 11-7)
-  TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
-          | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
-          //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
-          ;
-  TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
-          | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
-          ;
-  // set PWM resolution
-  PWM1_TOP = PWM_TOP;
-
-  // set up e-switch
-  SWITCH_PUE = (1 << SWITCH_PIN);  // pull-up for e-switch
-  SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
-}
-
-#define LAYOUT_DEFINED
-
diff --git a/hwdef-Noctigon_K9.3.h b/hwdef-Noctigon_K9.3.h
deleted file mode 100644
index 2f1ffe0..0000000
--- a/hwdef-Noctigon_K9.3.h
+++ /dev/null
@@ -1,164 +0,0 @@
-// Noctigon K9.3 driver layout (attiny1634)
-// Copyright (C) 2020-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- * Pin / Name / Function
- *   1    PA6   2nd LED PWM (linear) (PWM1B)
- *   2    PA5   R: red aux LED (PWM0B)
- *   3    PA4   G: green aux LED
- *   4    PA3   B: blue aux LED
- *   5    PA2   button LED
- *   6    PA1   Opamp 2 enable (2nd LEDs)
- *   7    PA0   Opamp 1 enable (main LEDs)
- *   8    GND   GND
- *   9    VCC   VCC
- *  10    PC5   (none)
- *  11    PC4   (none)
- *  12    PC3   RESET
- *  13    PC2   (none)
- *  14    PC1   SCK
- *  15    PC0   main LED PWM (FET) (PWM0A)
- *  16    PB3   main LED PWM (linear) (PWM1A)
- *  17    PB2   MISO
- *  18    PB1   MOSI / battery voltage (ADC6)
- *  19    PB0   (none)
- *  20    PA7   e-switch (PCINT7)
- *      ADC12   thermal sensor
- *
- * Main LED power uses one pin to turn the Opamp on/off,
- * and one pin to control Opamp power level.
- * Main brightness control uses the power level pin, with 4 kHz 10-bit PWM.
- * The on/off pin is only used to turn the main LED on and off,
- * not to change brightness.
- * Some models also have a direct-drive FET for turbo.
- */
-
-#ifdef ATTINY
-#undef ATTINY
-#endif
-#define ATTINY 1634
-#include <avr/io.h>
-
-#define PWM_CHANNELS 3  // 2 for main LEDs, 1 for 2nd LEDs
-#define PWM_BITS 10  // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz
-#define PWM_TOP 1023
-
-#define SWITCH_PIN   PA7     // pin 20
-#define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
-#define SWITCH_PCIE  PCIE0   // PCIE1 is for PCINT[7:0]
-#define SWITCH_PCMSK PCMSK0  // PCMSK1 is for PCINT[7:0]
-#define SWITCH_PORT  PINA    // PINA or PINB or PINC
-#define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
-
-#define PWM1_PIN PB3        // pin 16, Opamp reference
-#define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
-
-#define PWM2_PIN PC0        // pin 15, DD FET PWM
-#define PWM2_LVL OCR0A      // OCR0A is the output compare register for PC0
-
-#define PWM3_PIN PA6        // pin 1, 2nd LED Opamp reference
-#define PWM3_LVL OCR1B      // OCR1B is the output compare register for PA6
-
-#define LED_ENABLE_PIN  PA0    // pin 7, Opamp power
-#define LED_ENABLE_PORT PORTA  // control port for PA0
-
-#define LED2_ENABLE_PIN  PA1    // pin 6, Opamp power
-#define LED2_ENABLE_PORT PORTA  // control port for PA1
-
-
-#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
-#define VOLTAGE_PIN PB1      // Pin 18 / PB1 / ADC6
-// pin to ADC mappings are in DS table 19-4
-#define VOLTAGE_ADC      ADC6D  // digital input disable pin for PB1
-// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
-#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC6D
-// DS tables 19-3, 19-4
-// Bit   7     6     5      4     3    2    1    0
-//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
-// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
-// divided by ...
-// REFS[1:0] = 1, 0 for internal 1.1V reference
-// other bits reserved
-#define ADMUX_VOLTAGE_DIVIDER 0b10000110
-#define ADC_PRSCL   0x07    // clk/128
-
-// Raw ADC readings at 4.4V and 2.2V
-// calibrate the voltage readout here
-// estimated / calculated values are:
-//   (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
-// D1, R1, R2 = 0, 330, 100
-#ifndef ADC_44
-//#define ADC_44 981  // raw value at 4.40V
-#define ADC_44 967  // manually tweaked so 4.16V will blink out 4.2
-#endif
-#ifndef ADC_22
-//#define ADC_22 489  // raw value at 2.20V
-#define ADC_22 482  // manually tweaked so 4.16V will blink out 4.2
-#endif
-
-// this light has aux LEDs under the optic
-#define AUXLED_R_PIN    PA5    // pin 2
-#define AUXLED_G_PIN    PA4    // pin 3
-#define AUXLED_B_PIN    PA3    // pin 4
-#define AUXLED_RGB_PORT PORTA  // PORTA or PORTB or PORTC
-#define AUXLED_RGB_DDR  DDRA   // DDRA or DDRB or DDRC
-#define AUXLED_RGB_PUE  PUEA   // PUEA or PUEB or PUEC
-
-#define BUTTON_LED_PIN  PA2    // pin 5
-#define BUTTON_LED_PORT PORTA  // for all "PA" pins
-#define BUTTON_LED_DDR  DDRA   // for all "PA" pins
-#define BUTTON_LED_PUE  PUEA   // for all "PA" pins
-
-// with so many pins, doing this all with #ifdefs gets awkward...
-// ... so just hardcode it in each hwdef file instead
-inline void hwdef_setup() {
-  // enable output ports
-  DDRC = (1 << PWM2_PIN);
-  DDRB = (1 << PWM1_PIN);
-  DDRA = (1 << PWM3_PIN)
-       | (1 << AUXLED_R_PIN)
-       | (1 << AUXLED_G_PIN)
-       | (1 << AUXLED_B_PIN)
-       | (1 << BUTTON_LED_PIN)
-       | (1 << LED_ENABLE_PIN)
-       | (1 << LED2_ENABLE_PIN)
-       ;
-
-  // configure PWM
-  // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
-  // pre-scale for timer: N = 1
-  // Linear opamp PWM for both main and 2nd LEDs (10-bit)
-  // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
-  // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
-  // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
-  // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
-  TCCR1A  = (1<<WGM11)  | (1<<WGM10)   // 10-bit (TOP=0x03FF) (DS table 12-5)
-          | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
-          | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
-          ;
-  TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
-          | (0<<WGM13)  | (0<<WGM12)  // phase-correct PWM (DS table 12-5)
-          ;
-
-  // FET PWM (8-bit; this channel can't do 10-bit)
-  // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
-  // CS0[2:0]:  0,0,1: clk/1 (No prescaling) (DS table 11-9)
-  // COM0A[1:0]:  1,0: PWM OC0A in the normal direction (DS table 11-4)
-  // COM0B[1:0]:  1,0: PWM OC0B in the normal direction (DS table 11-7)
-  TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
-          | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
-          //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
-          ;
-  TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
-          | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
-          ;
-
-  // set up e-switch
-  PUEA = (1 << SWITCH_PIN);  // pull-up for e-switch
-  SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
-}
-
-#define LAYOUT_DEFINED
-
diff --git a/hwdef-emisar-2ch-fet.c b/hwdef-emisar-2ch-fet.c
new file mode 100644
index 0000000..ea4f5e6
--- /dev/null
+++ b/hwdef-emisar-2ch-fet.c
@@ -0,0 +1,220 @@
+// Emisar generic 2-channel + DD FET w/ tint ramping
+// Copyright (C) 2021-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include "chan-rgbaux.c"
+
+
+void set_level_ch1(uint8_t level);
+void set_level_ch2(uint8_t level);
+void set_level_both(uint8_t level);
+void set_level_blend(uint8_t level);
+void set_level_auto(uint8_t level);
+
+bool gradual_tick_ch1(uint8_t gt);
+bool gradual_tick_ch2(uint8_t gt);
+bool gradual_tick_both(uint8_t gt);
+bool gradual_tick_blend(uint8_t gt);
+bool gradual_tick_auto(uint8_t gt);
+
+
+Channel channels[] = {
+    { // channel 1 only
+        .set_level    = set_level_ch1,
+        .gradual_tick = gradual_tick_ch1,
+        .has_args     = 0
+    },
+    { // channel 2 only
+        .set_level    = set_level_ch2,
+        .gradual_tick = gradual_tick_ch2,
+        .has_args     = 0
+    },
+    { // both channels, tied together (max "200%" power)
+        .set_level    = set_level_both,
+        .gradual_tick = gradual_tick_both,
+        .has_args     = 0
+    },
+    { // both channels, manual blend (max "100%" power)
+        .set_level    = set_level_blend,
+        .gradual_tick = gradual_tick_blend,
+        .has_args     = 1
+    },
+    { // both channels, auto blend
+        .set_level    = set_level_auto,
+        .gradual_tick = gradual_tick_auto,
+        .has_args     = 1
+    },
+    RGB_AUX_CHANNELS
+};
+
+
+// set new values for both channels,
+// handling any possible combination
+// and any before/after state
+void set_pwms(uint8_t ch1_pwm, uint8_t ch2_pwm, uint8_t ch3_pwm, uint16_t top) {
+    bool was_on = (CH1_PWM>0) | (CH2_PWM>0) | (CH3_PWM>0);
+    bool now_on = (ch1_pwm>0) | (ch2_pwm>0) | (ch3_pwm>0);
+
+    if (! now_on) {
+        CH1_PWM = 0;  // linear
+        CH2_PWM = 0;  // linear
+        CH3_PWM = 0;  // DD FET
+        PWM_TOP = PWM_TOP_INIT;
+        PWM_CNT = 0;
+        CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable opamp
+        CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN);  // disable opamp
+        return;
+    }
+
+    if (ch1_pwm)
+        CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN);  // enable opamp
+    else
+        CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN);  // disable opamp
+
+    if (ch2_pwm)
+        CH2_ENABLE_PORT |= (1 << CH2_ENABLE_PIN);  // enable opamp
+    else
+        CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN);  // disable opamp
+
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+    CH3_PWM = ch3_pwm;
+
+    // manual phase sync when changing level while already on
+    if (was_on && now_on) while(PWM_CNT > (top - 32)) {}
+
+    PWM_TOP = top;
+
+    // reset phase when turning on or off
+    //if ((! was_on) | (! now_on)) PWM_CNT = 0;
+    if (! was_on) PWM_CNT = 0;
+}
+
+void set_level_ch1(uint8_t level) {
+    if (0 == level)
+        return set_pwms(0, 0, 0, PWM_TOP_INIT);
+
+    level --;
+    uint8_t  pwm1 = PWM_GET8 (pwm1_levels, level);
+    uint8_t  pwm3 = PWM_GET8 (pwm2_levels, level);
+    uint16_t top  = PWM_GET16(pwm3_levels, level);
+    set_pwms(pwm1, 0, pwm3, top);
+}
+
+void set_level_ch2(uint8_t level) {
+    if (0 == level)
+        return set_pwms(0, 0, 0, PWM_TOP_INIT);
+
+    level --;
+    uint8_t  pwm2 = PWM_GET8 (pwm4_levels, level);
+    uint16_t top  = PWM_GET16(pwm5_levels, level);
+    set_pwms(0, pwm2, 0, top);
+}
+
+void set_level_both(uint8_t level) {
+    if (0 == level)
+        return set_pwms(0, 0, 0, PWM_TOP_INIT);
+
+    level --;
+    uint8_t  pwm1 = PWM_GET8 (pwm1_levels, level);
+    uint8_t  pwm3 = PWM_GET8 (pwm2_levels, level);
+    uint16_t top  = PWM_GET16(pwm3_levels, level);
+    set_pwms(pwm1, pwm1, pwm3, top);
+}
+
+void set_level_blend(uint8_t level) {
+    if (0 == level)
+        return set_pwms(0, 0, 0, PWM_TOP_INIT);
+
+    level --;
+    uint16_t pwm1, pwm2;
+    uint8_t  pwm3       = PWM_GET8 (pwm2_levels, level);  // DD FET
+    //uint16_t brightness = PWM_GET8 (pwm1_levels, level) << 1;
+    uint16_t brightness = PWM_GET8 (pwm1_levels, level) + pwm3;
+    uint16_t top        = PWM_GET16(pwm3_levels, level);
+    uint8_t  blend      = cfg.channel_mode_args[cfg.channel_mode];
+
+    calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend);
+
+    set_pwms(pwm1, pwm2, pwm3, top);
+}
+
+void set_level_auto(uint8_t level) {
+    if (0 == level)
+        return set_pwms(0, 0, 0, PWM_TOP_INIT);
+
+    level --;
+    uint16_t pwm1, pwm2;
+    uint8_t  brightness = PWM_GET8 (pwm4_levels, level);
+    uint16_t top        = PWM_GET16(pwm5_levels, level);
+    uint8_t  blend      = 255 * (uint16_t)level / RAMP_SIZE;
+    if (cfg.channel_mode_args[cfg.channel_mode] & 0b01000000)
+        blend = 255 - blend;
+
+    calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend);
+
+    set_pwms(pwm1, pwm2, 0, top);
+}
+
+
+///// bump each channel toward a target value /////
+bool gradual_adjust(uint8_t ch1_pwm, uint8_t ch2_pwm, uint8_t ch3_pwm) {
+    GRADUAL_ADJUST_STACKED(ch1_pwm, CH1_PWM, PWM_TOP_INIT);
+    GRADUAL_ADJUST_STACKED(ch2_pwm, CH2_PWM, PWM_TOP_INIT);
+    GRADUAL_ADJUST_SIMPLE (ch3_pwm, CH3_PWM);
+
+    // check for completion
+    if ((ch1_pwm == CH1_PWM)
+     && (ch2_pwm == CH2_PWM)
+     && (ch3_pwm == CH3_PWM)) {
+        return true;  // done
+    }
+    return false;  // not done yet
+}
+
+bool gradual_tick_ch1(uint8_t gt) {
+    uint8_t pwm1 = PWM_GET8(pwm1_levels, gt);
+    uint8_t pwm3 = PWM_GET8(pwm2_levels, gt);
+    return gradual_adjust(pwm1, 0, pwm3);
+}
+
+bool gradual_tick_ch2(uint8_t gt) {
+    uint8_t pwm2 = PWM_GET8(pwm4_levels, gt);
+    return gradual_adjust(0, pwm2, 0);
+}
+
+bool gradual_tick_both(uint8_t gt) {
+    uint8_t pwm1 = PWM_GET8(pwm1_levels, gt);
+    uint8_t pwm3 = PWM_GET8(pwm2_levels, gt);
+    return gradual_adjust(pwm1, pwm1, pwm3);
+}
+
+bool gradual_tick_blend(uint8_t level) {
+    uint16_t pwm1, pwm2;
+    uint8_t  pwm3       = PWM_GET8 (pwm2_levels, level);  // DD FET
+    //uint16_t brightness = PWM_GET8 (pwm1_levels, level) << 1;
+    uint16_t brightness = PWM_GET8 (pwm1_levels, level) + pwm3;
+    uint16_t top        = PWM_GET16(pwm3_levels, level);
+    uint8_t  blend      = cfg.channel_mode_args[cfg.channel_mode];
+
+    calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend);
+
+    return gradual_adjust(pwm1, pwm2, pwm3);
+}
+
+bool gradual_tick_auto(uint8_t level) {
+    uint16_t pwm1, pwm2;
+    uint8_t  brightness = PWM_GET8 (pwm4_levels, level);
+    uint16_t top        = PWM_GET16(pwm5_levels, level);
+    uint8_t  blend      = 255 * (uint16_t)level / RAMP_SIZE;
+    if (cfg.channel_mode_args[cfg.channel_mode] & 0b01000000)
+        blend = 255 - blend;
+
+    calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend);
+
+    return gradual_adjust(pwm1, pwm2, 0);
+}
+
+
diff --git a/hwdef-emisar-2ch-fet.h b/hwdef-emisar-2ch-fet.h
new file mode 100644
index 0000000..451cdfc
--- /dev/null
+++ b/hwdef-emisar-2ch-fet.h
@@ -0,0 +1,209 @@
+// Emisar 2-channel generic w/ tint ramping + DD FET
+// Copyright (C) 2021-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ * Pin / Name / Function
+ *   1    PA6   ch2 LED PWM (linear) (PWM1B)
+ *   2    PA5   R: red aux LED (PWM0B)
+ *   3    PA4   G: green aux LED
+ *   4    PA3   B: blue aux LED
+ *   5    PA2   button LED
+ *   6    PA1   Opamp 2 enable (channel 2 LEDs)
+ *   7    PA0   Opamp 1 enable (channel 1 LEDs)
+ *   8    GND   GND
+ *   9    VCC   VCC
+ *  10    PC5   (none)
+ *  11    PC4   (none)
+ *  12    PC3   RESET
+ *  13    PC2   (none)
+ *  14    PC1   SCK
+ *  15    PC0   ch1 LED PWM (FET) (PWM0A, 8-bit)
+ *  16    PB3   ch1 LED PWM (linear) (PWM1A)
+ *  17    PB2   MISO
+ *  18    PB1   MOSI / battery voltage (ADC6)
+ *  19    PB0   (none)
+ *  20    PA7   e-switch (PCINT7)
+ *      ADC12   thermal sensor
+ *
+ * Both sets of LEDs use one pin to turn the Opamp on/off,
+ * and one pin to control the Opamp power level.
+ * The first channel also has a direct-drive FET for turbo.
+ */
+
+#define ATTINY 1634
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-emisar-2ch-fet.c
+
+// allow using aux LEDs as extra channel modes
+#include "chan-rgbaux.h"
+
+// channel modes:
+// * 0. channel 1 only (linear + DD FET)
+// * 1. channel 2 only (linear)
+// * 2. both channels, tied together (linear tied + DD FET at top of ramp)
+// * 3. both channels, manual blend, max 200% power + DD FET at top of ramp
+// * 4. both channels, auto blend, reversible (linear only)
+#define NUM_CHANNEL_MODES   (5 + NUM_RGB_AUX_CHANNEL_MODES)
+enum channel_modes_e {
+    CM_CH1 = 0,
+    CM_CH2,
+    CM_BOTH,
+    CM_BLEND,
+    CM_AUTO,
+    RGB_AUX_ENUMS
+};
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b0000000000011111
+#define USE_CHANNEL_MODE_ARGS
+// _, _, _, 128=middle CCT, 0=warm-to-cool
+#define CHANNEL_MODE_ARGS     0,0,0,128,0,RGB_AUX_CM_ARGS
+
+// can use some of the common handlers
+#define USE_CALC_2CH_BLEND
+
+
+#define PWM_CHANNELS 3  // old, remove this
+
+#define PWM_BITS      16     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
+#define PWM_GET       PWM_GET8
+#define PWM_DATATYPE  uint16_t
+#define PWM_DATATYPE2 uint16_t  // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint8_t   // linear part of linear+FET ramp
+#define PWM2_DATATYPE uint8_t   // DD FET part of linear+FET ramp
+#define PWM3_DATATYPE uint16_t  // linear+FET ramp tops
+#define PWM4_DATATYPE uint8_t   // linear-only ramp
+#define PWM5_DATATYPE uint16_t  // linear-only ramp tops
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP       ICR1   // holds the TOP value for for variable-resolution PWM
+#define PWM_TOP_INIT  255    // highest value used in top half of ramp
+#define PWM_CNT       TCNT1  // for dynamic PWM, reset phase
+
+// main LEDs, linear
+#define CH1_PIN  PB3            // pin 16, Opamp reference
+#define CH1_PWM  OCR1A          // OCR1A is the output compare register for PB3
+#define CH1_ENABLE_PIN   PA0    // pin 7, Opamp power
+#define CH1_ENABLE_PORT  PORTA  // control port for PA0
+
+// 2nd LEDs, linear
+#define CH2_PIN  PA6            // pin 1, 2nd LED Opamp reference
+#define CH2_PWM  OCR1B          // OCR1B is the output compare register for PA6
+#define CH2_ENABLE_PIN   PA1    // pin 6, Opamp power
+#define CH2_ENABLE_PORT  PORTA  // control port for PA1
+
+// main LEDs, DD FET
+#define CH3_PIN  PC0            // pin 15, DD FET PWM
+#define CH3_PWM  OCR0A          // OCR0A is the output compare register for PC0
+
+// e-switch
+#ifndef SWITCH_PIN
+#define SWITCH_PIN   PA7     // pin 20
+#define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
+#define SWITCH_PCIE  PCIE0   // PCIE1 is for PCINT[7:0]
+#define SWITCH_PCMSK PCMSK0  // PCMSK1 is for PCINT[7:0]
+#define SWITCH_PORT  PINA    // PINA or PINB or PINC
+#define SWITCH_PUE   PUEA    // pullup group A
+#define PCINT_vect   PCINT0_vect  // ISR for PCINT[7:0]
+#endif
+
+#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
+#define VOLTAGE_PIN PB1      // Pin 18 / PB1 / ADC6
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC      ADC6D  // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC6D
+// DS tables 19-3, 19-4
+// Bit   7     6     5      4     3    2    1    0
+//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
+// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
+// divided by ...
+// REFS[1:0] = 1, 0 for internal 1.1V reference
+// other bits reserved
+#define ADMUX_VOLTAGE_DIVIDER 0b10000110
+#define ADC_PRSCL   0x07    // clk/128
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+//   (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
+// D1, R1, R2 = 0, 330, 100
+#ifndef ADC_44
+//#define ADC_44 981  // raw value at 4.40V
+#define ADC_44 967  // manually tweaked so 4.16V will blink out 4.2
+#endif
+#ifndef ADC_22
+//#define ADC_22 489  // raw value at 2.20V
+#define ADC_22 482  // manually tweaked so 4.16V will blink out 4.2
+#endif
+
+// this light has aux LEDs under the optic
+#define AUXLED_R_PIN    PA5    // pin 2
+#define AUXLED_G_PIN    PA4    // pin 3
+#define AUXLED_B_PIN    PA3    // pin 4
+#define AUXLED_RGB_PORT PORTA  // PORTA or PORTB or PORTC
+#define AUXLED_RGB_DDR  DDRA   // DDRA or DDRB or DDRC
+#define AUXLED_RGB_PUE  PUEA   // PUEA or PUEB or PUEC
+
+#define BUTTON_LED_PIN  PA2    // pin 5
+#define BUTTON_LED_PORT PORTA  // for all "PA" pins
+#define BUTTON_LED_DDR  DDRA   // for all "PA" pins
+#define BUTTON_LED_PUE  PUEA   // for all "PA" pins
+
+
+inline void hwdef_setup() {
+    // enable output ports
+    DDRC = (1 << CH3_PIN);
+    DDRB = (1 << CH1_PIN);
+    DDRA = (1 << CH2_PIN)
+         | (1 << AUXLED_R_PIN)
+         | (1 << AUXLED_G_PIN)
+         | (1 << AUXLED_B_PIN)
+         | (1 << BUTTON_LED_PIN)
+         | (1 << CH1_ENABLE_PIN)
+         | (1 << CH2_ENABLE_PIN)
+         ;
+
+    // configure PWM
+    // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
+    // pre-scale for timer: N = 1
+    // Linear opamp PWM for both main and 2nd LEDs (10-bit)
+    // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
+    // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
+    // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
+    // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
+    TCCR1A  = (1<<WGM11)  | (0<<WGM10)   // adjustable PWM (TOP=ICR1) (DS table 12-5)
+            | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
+            | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
+            ;
+    TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
+            | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
+            ;
+
+    // FET PWM (8-bit; this channel can't do 10-bit)
+    // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
+    // CS0[2:0]:  0,0,1: clk/1 (No prescaling) (DS table 11-9)
+    // COM0A[1:0]:  1,0: PWM OC0A in the normal direction (DS table 11-4)
+    // COM0B[1:0]:  1,0: PWM OC0B in the normal direction (DS table 11-7)
+    TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
+            | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
+            //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
+            ;
+    TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
+            | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
+            ;
+
+    // set PWM resolution
+    PWM_TOP = PWM_TOP_INIT;
+
+    // set up e-switch
+    SWITCH_PUE = (1 << SWITCH_PIN);  // pull-up for e-switch
+    SWITCH_PCMSK = (1 << SWITCH_PCINT);  // enable pin change interrupt
+}
+
+
+#define LAYOUT_DEFINED
+
diff --git a/hwdef-emisar-2ch.h b/hwdef-emisar-2ch.h
index 32cbc3b..6d43a24 100644
--- a/hwdef-emisar-2ch.h
+++ b/hwdef-emisar-2ch.h
@@ -26,6 +26,9 @@
  *  19    PB0   (none)
  *  20    PA7   e-switch (PCINT7)
  *      ADC12   thermal sensor
+ *
+ * Both sets of LEDs use one pin to turn the Opamp on/off,
+ * and one pin to control the Opamp power level.
  */
 
 #define ATTINY 1634
@@ -62,7 +65,7 @@ enum channel_modes_e {
 #define USE_CALC_2CH_BLEND
 
 
-#define PWM_CHANNELS 1  // old, remove this
+#define PWM_CHANNELS 2  // old, remove this
 
 #define PWM_BITS      16     // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz
 #define PWM_GET       PWM_GET16
@@ -77,18 +80,21 @@ enum channel_modes_e {
 #define PWM_TOP_INIT  511    // highest value used in top half of ramp
 #define PWM_CNT       TCNT1  // for dynamic PWM, reset phase
 
+// main LEDs, linear
 #define CH1_PIN  PB3            // pin 16, Opamp reference
 #define CH1_PWM  OCR1A          // OCR1A is the output compare register for PB3
 #define CH1_ENABLE_PIN   PA0    // pin 7, Opamp power
 #define CH1_ENABLE_PORT  PORTA  // control port for PA0
 
+// 2nd LEDs, linear
 #define CH2_PIN  PA6            // pin 1, 2nd LED Opamp reference
 #define CH2_PWM  OCR1B          // OCR1B is the output compare register for PA6
 #define CH2_ENABLE_PIN   PA1    // pin 6, Opamp power
 #define CH2_ENABLE_PORT  PORTA  // control port for PA1
 
+// main LEDs, DD FET
 //#define CH3_PIN  PC0            // pin 15, DD FET PWM
-//#define CH3_LVL  OCR0A          // OCR0A is the output compare register for PC0
+//#define CH3_PWM  OCR0A          // OCR0A is the output compare register for PC0
 
 // e-switch
 #ifndef SWITCH_PIN
@@ -175,19 +181,21 @@ inline void hwdef_setup() {
             ;
 
     // unused on this driver
+    #if 0
     // FET PWM (8-bit; this channel can't do 10-bit)
     // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8)
     // CS0[2:0]:  0,0,1: clk/1 (No prescaling) (DS table 11-9)
     // COM0A[1:0]:  1,0: PWM OC0A in the normal direction (DS table 11-4)
     // COM0B[1:0]:  1,0: PWM OC0B in the normal direction (DS table 11-7)
-    //TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
-    //        | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
-    //        //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
-    //        ;
-    //TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
-    //        | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
-    //        ;
-    //CH3_LVL = 0;  // ensure this channel is off, if it exists
+    TCCR0A  = (0<<WGM01)  | (1<<WGM00)   // 8-bit (TOP=0xFF) (DS table 11-8)
+            | (1<<COM0A1) | (0<<COM0A0)  // PWM 0A in normal direction (DS table 11-4)
+            //| (1<<COM0B1) | (0<<COM0B0)  // PWM 0B in normal direction (DS table 11-7)
+            ;
+    TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
+            | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
+            ;
+    CH3_PWM = 0;  // ensure this channel is off, if it exists
+    #endif
 
     // set PWM resolution
     PWM_TOP = PWM_TOP_INIT;