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| author | Selene ToyKeeper | 2020-10-16 22:12:35 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2020-10-16 22:12:35 -0600 |
| commit | fdecdb45ba4b14d3980e8863360d724d4ce98880 (patch) | |
| tree | e84b2d87353a66150a75edd1df2ceacb2faa6d4b /hwdef-Noctigon_K9.3.h | |
| parent | added K9.3-noFET build target (for models with E21A as main LEDs) (diff) | |
| download | anduril-fdecdb45ba4b14d3980e8863360d724d4ce98880.tar.gz anduril-fdecdb45ba4b14d3980e8863360d724d4ce98880.tar.bz2 anduril-fdecdb45ba4b14d3980e8863360d724d4ce98880.zip | |
swapped PWM1 and PWM3 channels on K9.3, because I may have had them backward
Diffstat (limited to 'hwdef-Noctigon_K9.3.h')
| -rw-r--r-- | hwdef-Noctigon_K9.3.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/hwdef-Noctigon_K9.3.h b/hwdef-Noctigon_K9.3.h index 6032b4c..ae9f907 100644 --- a/hwdef-Noctigon_K9.3.h +++ b/hwdef-Noctigon_K9.3.h @@ -4,7 +4,7 @@ /* Noctigon K9.3 driver layout (attiny1634) * * Pin / Name / Function - * 1 PA6 2nd LED PWM (linear) (PWM1B) + * 1 PA6 main LED PWM (linear) (PWM1B) * 2 PA5 R: red aux LED (PWM0B) * 3 PA4 G: green aux LED * 4 PA3 B: blue aux LED @@ -19,7 +19,7 @@ * 13 PC2 (none) * 14 PC1 SCK * 15 PC0 main LED PWM (FET) (PWM0A) - * 16 PB3 main LED PWM (linear) (PWM1A) + * 16 PB3 2nd LED PWM (linear) (PWM1A) * 17 PB2 MISO * 18 PB1 MOSI / battery voltage (ADC6) * 19 PB0 (none) @@ -51,20 +51,20 @@ #define SWITCH_PORT PINA // PINA or PINB or PINC #define PCINT_vect PCINT0_vect // ISR for PCINT[7:0] -#define PWM1_PIN PB3 // pin 16, Opamp reference -#define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3 +#define PWM1_PIN PA6 // pin 1, 2nd LED Opamp reference +#define PWM1_LVL OCR1B // OCR1B is the output compare register for PA6 #define PWM2_PIN PC0 // pin 15, DD FET PWM #define PWM2_LVL OCR0A // OCR0A is the output compare register for PC0 -#define PWM3_PIN PA6 // pin 1, 2nd LED Opamp reference -#define PWM3_LVL OCR1B // OCR1B is the output compare register for PA6 +#define PWM3_PIN PB3 // pin 16, Opamp reference +#define PWM3_LVL OCR1A // OCR1A is the output compare register for PB3 -#define LED_ENABLE_PIN PA0 // pin 7, Opamp power -#define LED_ENABLE_PORT PORTA // control port for PA0 +#define LED_ENABLE_PIN PA1 // pin 6, Opamp power +#define LED_ENABLE_PORT PORTA // control port for PA1 -#define LED2_ENABLE_PIN PA1 // pin 6, Opamp power -#define LED2_ENABLE_PORT PORTA // control port for PA1 +#define LED2_ENABLE_PIN PA0 // pin 7, Opamp power +#define LED2_ENABLE_PORT PORTA // control port for PA0 #define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened @@ -115,8 +115,8 @@ inline void hwdef_setup() { // enable output ports DDRC = (1 << PWM2_PIN); - DDRB = (1 << PWM1_PIN); - DDRA = (1 << PWM3_PIN) + DDRB = (1 << PWM3_PIN); + DDRA = (1 << PWM1_PIN) | (1 << AUXLED_R_PIN) | (1 << AUXLED_G_PIN) | (1 << AUXLED_B_PIN) |