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| author | Selene ToyKeeper | 2023-05-30 06:17:01 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2023-05-30 06:17:01 -0600 |
| commit | 83e7dc7cc45e789b819c1dec2f419252ebdf5eae (patch) | |
| tree | ed14ebcbc4d3b16436d2025defe77b63c6533952 /hwdef-emisar-d4v2.h | |
| parent | gradual adjustments: handle 0-to-255 in one step on the way up too, not just ... (diff) | |
| download | anduril-83e7dc7cc45e789b819c1dec2f419252ebdf5eae.tar.gz anduril-83e7dc7cc45e789b819c1dec2f419252ebdf5eae.tar.bz2 anduril-83e7dc7cc45e789b819c1dec2f419252ebdf5eae.zip | |
synced configs between D4v2 and KR4
Diffstat (limited to '')
| -rw-r--r-- | hwdef-emisar-d4v2.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hwdef-emisar-d4v2.h b/hwdef-emisar-d4v2.h index a502421..728d9e4 100644 --- a/hwdef-emisar-d4v2.h +++ b/hwdef-emisar-d4v2.h @@ -64,7 +64,7 @@ enum CHANNEL_MODES { #define CHANNEL_HAS_ARGS 0b00000000 // no args //#define USE_CHANNEL_MODE_ARGS -//#define CHANNEL_MODE_ARGS 0,0,0,0 +//#define CHANNEL_MODE_ARGS 0,0,0,0,0,0,0,0 #define SET_LEVEL_MODES set_level_main, \ set_level_auxred, \ @@ -105,7 +105,7 @@ enum CHANNEL_MODES { // DD FET channel #define CH2_PIN PA6 // pin 1, DD FET PWM -#define CH2_PWM OCR1B // OCR1B is the output compare register for PB1 +#define CH2_PWM OCR1B // OCR1B is the output compare register for PA6 // e-switch #define SWITCH_PIN PA2 // pin 5 |