diff options
| author | Selene ToyKeeper | 2019-09-28 23:14:16 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2019-09-28 23:14:16 -0600 |
| commit | 0df827391ced9bb0b7114248c78b696de4676b25 (patch) | |
| tree | d6e57c1ee063c0f7bd9186b80cc6a4fd889c2514 /tk-attiny.h | |
| parent | un-hardcoded 255 as the highest PWM level, and used a "PWM_TOP" value instead (diff) | |
| download | anduril-0df827391ced9bb0b7114248c78b696de4676b25.tar.gz anduril-0df827391ced9bb0b7114248c78b696de4676b25.tar.bz2 anduril-0df827391ced9bb0b7114248c78b696de4676b25.zip | |
remapped D1S V2 pins to match new driver
(and changed a bit about how ADC / DIDR definitions work, since this now uses DIDR1 instead of DIDR0)
Diffstat (limited to '')
| -rw-r--r-- | tk-attiny.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tk-attiny.h b/tk-attiny.h index 947a87c..4d0c7e0 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -34,6 +34,7 @@ #define ADMUX_VCC 0b00001100 #define DELAY_ZERO_TIME 252 #define SWITCH_PORT PINB // PINA or PINB or PINC + #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR #elif (ATTINY == 25) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL @@ -44,6 +45,7 @@ #define ADMUX_THERM 0b10001111 #define DELAY_ZERO_TIME 1020 #define SWITCH_PORT PINB // PINA or PINB or PINC + #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR #elif (ATTINY == 85) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL @@ -56,6 +58,7 @@ #define ADMUX_THERM 0b10001111 #define DELAY_ZERO_TIME 1020 #define SWITCH_PORT PINB // PINA or PINB or PINC + #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR #elif (ATTINY == 1634) #define F_CPU 8000000UL #define V_REF REFS1 @@ -66,6 +69,7 @@ #define ADMUX_THERM 0b10001110 #define DELAY_ZERO_TIME 1020 //#define SWITCH_PORT PINA // set this in hwdef + //#define VOLTAGE_ADC_DIDR DIDR0 // set this in hwdef #else #error Hey, you need to define ATTINY. #endif |