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| author | Selene ToyKeeper | 2017-08-18 18:12:17 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2017-08-18 18:12:17 -0600 |
| commit | e96562e36df96ca755d527e479e597ae4e4e09e1 (patch) | |
| tree | 9d75c5eb9c8a68a6ea45ea06134c1a780bcbd416 /tk-attiny.h | |
| parent | merged crescendo updates: added thermal regulation (diff) | |
| download | anduril-e96562e36df96ca755d527e479e597ae4e4e09e1.tar.gz anduril-e96562e36df96ca755d527e479e597ae4e4e09e1.tar.bz2 anduril-e96562e36df96ca755d527e479e597ae4e4e09e1.zip | |
Some early ideas for Round Table. Nothing close to compile-able yet.
Diffstat (limited to 'tk-attiny.h')
| -rw-r--r-- | tk-attiny.h | 82 |
1 files changed, 81 insertions, 1 deletions
diff --git a/tk-attiny.h b/tk-attiny.h index 72ed2f0..ebd997f 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -4,7 +4,7 @@ * Attiny portability header. * This helps abstract away the differences between various attiny MCUs. * - * Copyright (C) 2015 Selene ToyKeeper + * Copyright (C) 2017 Selene ToyKeeper * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -31,12 +31,25 @@ #define EEPSIZE 64 #define V_REF REFS0 #define BOGOMIPS 950 + #define ADMUX_VCC 0b00001100 #elif (ATTINY == 25) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL #define EEPSIZE 128 #define V_REF REFS1 #define BOGOMIPS (F_CPU/4000) + #define ADMUX_VCC 0b00001100 + #define ADMUX_THERM 0b10001111 +#elif (ATTINY == 85) + // TODO: Use 6.4 MHz instead of 8 MHz? + #define F_CPU 8000000UL + #define EEPSIZE 512 + #define V_REF REFS1 + #define BOGOMIPS (F_CPU/4000) + // (1 << V_REF) | (0 << ADLAR) | (VCC_CHANNEL) + #define ADMUX_VCC 0b00001100 + // (1 << V_REF) | (0 << ADLAR) | (THERM_CHANNEL) + #define ADMUX_THERM 0b10001111 #else Hey, you need to define ATTINY. #endif @@ -145,6 +158,73 @@ #endif // NANJG_LAYOUT + +#ifdef RT_EMISAR_D4_LAYOUT +/* + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- + * AUX LED -|3 6|- PWM (FET) + * GND -|4 5|- PWM (1x7135) + * ---- + */ + +#define AUXLED_PIN PB4 // pin 3 + +#define SWITCH_PIN PB3 // pin 2, OTC +#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) +#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 + +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 + +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif + + +#ifdef RT_TKSABER_LAYOUT +/* + * ---- + * Reset -|1 8|- VCC + * PWM 4 (A) -|2 7|- e-switch + * PWM 3 (B) -|3 6|- PWM 2 (G) + * GND -|4 5|- PWM 1 (R) + * ---- + */ + +#define PWM1_PIN PB0 // pin 5 +#define PWM1_LVL OCR0A +#define PWM2_PIN PB1 // pin 6 +#define PWM2_LVL OCR0B +#define PWM3_PIN PB4 // pin 3 +#define PWM3_LVL OCR1B +#define PWM4_PIN PB3 // pin 2 +#define PWM4_LVL OCR1A // FIXME: does this work? + +#define SWITCH_PIN PB2 // pin 7 + +#define ADC_PRSCL 0x07 // clk/128 (no need to be super fast) +// FIXME: What is the DIDR for pin 8? +//#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif // TKSABER_LAYOUT + + #ifndef PWM_LVL Hey, you need to define an I/O pin layout. #endif |
