aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat (limited to '')
-rw-r--r--hwdef-blf-lt1.c7
-rw-r--r--hwdef-blf-lt1.h2
-rw-r--r--spaghetti-monster/anduril/cfg-blf-lantern.h6
3 files changed, 10 insertions, 5 deletions
diff --git a/hwdef-blf-lt1.c b/hwdef-blf-lt1.c
index df17612..8a8af52 100644
--- a/hwdef-blf-lt1.c
+++ b/hwdef-blf-lt1.c
@@ -50,6 +50,10 @@ Channel channels[] = {
};
void set_level_zero() {
+ // disable timer 0 overflow interrupt
+ // (helps improve button press handling from Off state)
+ TIMSK &= ~(1 << TOIE0);
+
// turn off all LEDs
ch1_dsm_lvl = 0;
ch2_dsm_lvl = 0;
@@ -67,6 +71,9 @@ void set_hw_levels(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
// set hardware PWM levels and init dsm loop
CH1_PWM = ch1_pwm = ch1 >> 7;
CH2_PWM = ch2_pwm = ch2 >> 7;
+
+ // enable timer 0 overflow interrupt so DSM can work
+ TIMSK |= (1 << TOIE0);
}
// delta-sigma modulation of PWM outputs
diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h
index 571fa44..bac21cf 100644
--- a/hwdef-blf-lt1.h
+++ b/hwdef-blf-lt1.h
@@ -94,7 +94,7 @@ inline void hwdef_setup() {
TCCR0A = PHASE;
// enable timer 0 overflow interrupt for DSM purposes
- TIMSK |= (1 << TOIE0);
+ //TIMSK |= (1 << TOIE0); // moved to hwdef.c functions instead
// configure e-switch
PORTB = (1 << SWITCH_PIN); // e-switch is the only input
diff --git a/spaghetti-monster/anduril/cfg-blf-lantern.h b/spaghetti-monster/anduril/cfg-blf-lantern.h
index b4e9ce7..b4c47db 100644
--- a/spaghetti-monster/anduril/cfg-blf-lantern.h
+++ b/spaghetti-monster/anduril/cfg-blf-lantern.h
@@ -28,10 +28,8 @@
#define RAMP_SIZE 150
// delta-sigma modulated PWM (0b0HHHHHHHHLLLLLLL = 0, 8xHigh, 7xLow bits)
// (max is (255 << 7), because it's 8-bit PWM plus 7 bits of DSM)
-// level_calc.py 5.01 1 150 7135 2 0.2 600 --pwm 32640
-//#define PWM1_LEVELS 2,4,5,7,9,12,14,17,20,23,27,31,35,39,44,50,56,62,68,76,83,91,100,110,120,130,142,154,167,181,195,211,227,244,263,282,303,324,347,371,397,424,452,482,513,545,580,616,653,693,734,778,823,871,920,972,1026,1083,1142,1203,1267,1334,1403,1475,1551,1629,1710,1795,1883,1974,2069,2167,2269,2375,2485,2599,2717,2839,2965,3096,3232,3372,3517,3667,3822,3982,4148,4319,4495,4677,4865,5060,5260,5466,5679,5899,6125,6358,6599,6846,7101,7363,7633,7911,8197,8491,8793,9104,9424,9753,10090,10437,10794,11160,11536,11922,12319,12726,13143,13572,14011,14462,14925,15399,15885,16383,16894,17417,17954,18503,19066,19642,20232,20837,21456,22089,22737,23400,24079,24774,25484,26211,26954,27713,28490,29284,30096,30926,31774,32640
-// level_calc.py 5.01 1 150 7135 128 0.2 600 --pwm 32640
-#define PWM1_LEVELS 128,130,131,133,135,138,140,143,146,149,153,157,161,165,170,176,181,188,194,201,209,217,226,235,245,256,267,279,292,306,320,336,352,369,388,407,428,449,472,496,521,548,576,606,637,669,703,739,777,816,858,901,946,993,1043,1094,1148,1204,1263,1324,1388,1455,1524,1596,1671,1749,1830,1914,2002,2093,2187,2285,2387,2492,2601,2715,2832,2954,3080,3210,3345,3485,3629,3779,3933,4093,4258,4428,4604,4785,4973,5166,5366,5571,5783,6002,6228,6460,6699,6946,7199,7461,7730,8006,8291,8584,8885,9195,9514,9841,10178,10523,10878,11243,11618,12002,12397,12803,13219,13645,14083,14532,14993,15465,15949,16446,16955,17476,18010,18558,19118,19692,20280,20882,21499,22130,22775,23436,24112,24804,25512,26235,26976,27732,28506,29297,30106,30932,31777,32640
+// level_calc.py 3.333 1 150 7135 32 0.2 600 --pwm 32640
+#define PWM1_LEVELS 32,35,38,41,45,50,55,61,67,74,82,91,100,110,121,133,146,160,175,192,209,227,247,268,291,314,340,366,395,424,456,489,524,560,599,639,681,726,772,820,871,924,979,1036,1096,1158,1222,1289,1359,1431,1506,1584,1664,1747,1834,1923,2015,2111,2209,2311,2416,2524,2636,2751,2870,2992,3118,3247,3380,3518,3659,3803,3952,4105,4262,4423,4589,4759,4933,5111,5294,5482,5674,5871,6073,6279,6491,6707,6928,7155,7386,7623,7865,8113,8365,8624,8888,9157,9432,9713,10000,10292,10591,10895,11206,11523,11846,12175,12511,12853,13202,13557,13919,14287,14663,15045,15434,15830,16233,16644,17061,17486,17919,18358,18805,19260,19723,20193,20671,21156,21650,22152,22662,23180,23706,24241,24784,25335,25895,26464,27041,27627,28222,28826,29439,30060,30691,31332,31981,32640
#define DEFAULT_LEVEL 75
#define MAX_1x7135 75