diff options
| -rw-r--r-- | hwdef-BLF_GT.h | 40 | ||||
| -rw-r--r-- | hwdef-BLF_Q8.h | 16 | ||||
| -rw-r--r-- | hwdef-Emisar_D4.h | 36 | ||||
| -rw-r--r-- | hwdef-FET_7135.h | 32 | ||||
| -rw-r--r-- | hwdef-FW3A.h | 35 | ||||
| -rw-r--r-- | hwdef-Ferrero_Rocher.h | 11 | ||||
| -rw-r--r-- | hwdef-TK_Saber.h | 33 | ||||
| -rw-r--r-- | hwdef-Tripledown.h | 33 | ||||
| -rw-r--r-- | hwdef-nanjg.h | 16 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/cfg-blf-gt.h | 5 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/cfg-blf-q8.h | 4 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/cfg-emisar-d4.h | 3 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/cfg-fw3a.h | 3 | ||||
| -rw-r--r-- | tk-attiny.h | 282 |
14 files changed, 280 insertions, 269 deletions
diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h new file mode 100644 index 0000000..1a05741 --- /dev/null +++ b/hwdef-BLF_GT.h @@ -0,0 +1,40 @@ +/* BLF GT driver layout + * ---- + * Reset -|1 8|- VCC (unused) + * eswitch -|2 7|- Voltage divider + * AUX LED -|3 6|- Current control (buck level) + * GND -|4 5|- PWM (buck output on/off) + * ---- + */ + +#define PWM_CHANNELS 2 + +#define AUXLED_PIN PB4 // pin 3 + +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 + +#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2 +// 1.1V reference, left-adjust, ADC1/PB2 +//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL) +// 1.1V reference, no left-adjust, ADC1/PB2 +#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL) +#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line) +#define ADC_44 184 +#define ADC_22 92 + +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-BLF_Q8.h b/hwdef-BLF_Q8.h new file mode 100644 index 0000000..f00c392 --- /dev/null +++ b/hwdef-BLF_Q8.h @@ -0,0 +1,16 @@ +/* BLF Q8 driver layout + */ +// Q8 driver is the same as a D4, basically +#include "hwdef-Emisar_D4.h" + +// ... except the Q8 has a lighted button +#ifndef AUXLED_PIN +#define AUXLED_PIN PB4 // pin 3 +#endif + +// average drop across diode on this hardware +#ifdef VOLTAGE_FUDGE_FACTOR +#undef VOLTAGE_FUDGE_FACTOR +#endif +#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V + diff --git a/hwdef-Emisar_D4.h b/hwdef-Emisar_D4.h new file mode 100644 index 0000000..105d3b9 --- /dev/null +++ b/hwdef-Emisar_D4.h @@ -0,0 +1,36 @@ +/* Emisar D4 driver layout + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- + * AUX LED -|3 6|- PWM (FET) + * GND -|4 5|- PWM (1x7135) + * ---- + */ + +#define PWM_CHANNELS 2 + +#define AUXLED_PIN PB4 // pin 3 + +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 + +// (FIXME: remove? not used?) +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +// average drop across diode on this hardware +#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-FET_7135.h b/hwdef-FET_7135.h new file mode 100644 index 0000000..58df7b2 --- /dev/null +++ b/hwdef-FET_7135.h @@ -0,0 +1,32 @@ +/* FET + 7135 driver layout + * ---- + * Reset -|1 8|- VCC + * OTC -|2 7|- Voltage ADC + * Star 3 -|3 6|- PWM (FET) + * GND -|4 5|- PWM (1x7135) + * ---- + */ + +#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM +#define STAR3_PIN PB4 // pin 3 + +#define CAP_PIN PB3 // pin 2, OTC +#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) +#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 + +#define PWM_PIN PB1 // pin 6, FET PWM +#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 +#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM +#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0 + +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h new file mode 100644 index 0000000..5e253c7 --- /dev/null +++ b/hwdef-FW3A.h @@ -0,0 +1,35 @@ +/* BLF/TLF FW3A driver layout + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- optic nerve + * FET -|3 6|- 7x7135 + * GND -|4 5|- 1x7135 + * ---- + */ + +#define PWM_CHANNELS 3 + +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#define PWM3_PIN PB4 // pin 3 +#define PWM3_LVL OCR1B + +#define VISION_PIN PB2 // pin 7, optic nerve +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +// average drop across diode on this hardware +#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-Ferrero_Rocher.h b/hwdef-Ferrero_Rocher.h new file mode 100644 index 0000000..a46f19d --- /dev/null +++ b/hwdef-Ferrero_Rocher.h @@ -0,0 +1,11 @@ +/* Ferrero Rocher driver layout + * ---- + * Reset -|1 8|- VCC + * E-switch -|2 7|- Voltage ADC + * Red LED -|3 6|- PWM + * GND -|4 5|- Green LED + * ---- + */ +// TODO: fill in this section, update Ferrero_Rocher code to use it. +#define FAST 0x23 // fast PWM channel 1 only +#define PHASE 0x21 // phase-correct PWM channel 1 only diff --git a/hwdef-TK_Saber.h b/hwdef-TK_Saber.h new file mode 100644 index 0000000..e90d5dd --- /dev/null +++ b/hwdef-TK_Saber.h @@ -0,0 +1,33 @@ +/* TK 4-color lightsaber driver layout + * ---- + * Reset -|1 8|- VCC + * PWM 4 (A) -|2 7|- e-switch + * PWM 3 (G) -|3 6|- PWM 2 (B) + * GND -|4 5|- PWM 1 (R) + * ---- + */ + +#define PWM_CHANNELS 4 +#define PWM1_PIN PB0 // pin 5 +#define PWM1_LVL OCR0A +#define PWM2_PIN PB1 // pin 6 +#define PWM2_LVL OCR0B +#define PWM3_PIN PB4 // pin 3 +#define PWM3_LVL OCR1B +#define PWM4_PIN PB3 // pin 2 +#define PWM4_LVL OCR1A + +#define SWITCH_PIN PB2 // pin 7 +#define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt + +#define ADC_PRSCL 0x06 // clk/64 (no need to be super fast) + +// average drop across diode on this hardware +#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-Tripledown.h b/hwdef-Tripledown.h new file mode 100644 index 0000000..4676e69 --- /dev/null +++ b/hwdef-Tripledown.h @@ -0,0 +1,33 @@ +/* Tripledown driver layout + * ---- + * Reset -|1 8|- VCC + * OTC -|2 7|- Voltage ADC + * PWM (FET) -|3 6|- PWM (6x7135) + * GND -|4 5|- PWM (1x7135) + * ---- + */ + +#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM + +#define CAP_PIN PB3 // pin 2, OTC +#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) +#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 + +#define PWM_PIN PB1 // pin 6, 6x7135 PWM +#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 +#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM +#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0 +#define FET_PWM_PIN PB4 // pin 3 +#define FET_PWM_LVL OCR1B // output compare register for PB4 + +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + diff --git a/hwdef-nanjg.h b/hwdef-nanjg.h new file mode 100644 index 0000000..add10d1 --- /dev/null +++ b/hwdef-nanjg.h @@ -0,0 +1,16 @@ +/* NANJG driver layout + */ +#define STAR2_PIN PB0 +#define STAR3_PIN PB4 +#define STAR4_PIN PB3 +#define PWM_PIN PB1 +#define VOLTAGE_PIN PB2 +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 + +#define FAST 0x23 // fast PWM channel 1 only +#define PHASE 0x21 // phase-correct PWM channel 1 only + diff --git a/spaghetti-monster/anduril/cfg-blf-gt.h b/spaghetti-monster/anduril/cfg-blf-gt.h index e5ce2a1..904668a 100644 --- a/spaghetti-monster/anduril/cfg-blf-gt.h +++ b/spaghetti-monster/anduril/cfg-blf-gt.h @@ -1,3 +1,5 @@ +// BLF GT config options for Anduril + // the button lights up #define USE_INDICATOR_LED // the button is visible while main LEDs are on @@ -5,9 +7,6 @@ // enable blinking indicator LED while off #define TICK_DURING_STANDBY -// not relevant for this driver type -//#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V - // don't blink during ramp, it's irrelevant and annoying on this light #undef BLINK_AT_CHANNEL_BOUNDARIES #undef BLINK_AT_RAMP_CEILING diff --git a/spaghetti-monster/anduril/cfg-blf-q8.h b/spaghetti-monster/anduril/cfg-blf-q8.h index 379fca2..929fb55 100644 --- a/spaghetti-monster/anduril/cfg-blf-q8.h +++ b/spaghetti-monster/anduril/cfg-blf-q8.h @@ -1,3 +1,5 @@ +// BLF Q8 config options for Anduril + // the button lights up #define USE_INDICATOR_LED // the button is visible while main LEDs are on @@ -5,5 +7,3 @@ // enable blinking indicator LED while off #define TICK_DURING_STANDBY -// average drop across diode on this hardware -#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V diff --git a/spaghetti-monster/anduril/cfg-emisar-d4.h b/spaghetti-monster/anduril/cfg-emisar-d4.h index 4074f01..5421110 100644 --- a/spaghetti-monster/anduril/cfg-emisar-d4.h +++ b/spaghetti-monster/anduril/cfg-emisar-d4.h @@ -1,2 +1 @@ -// average drop across diode on this hardware -#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V +// Emisar D4 config options for Anduril diff --git a/spaghetti-monster/anduril/cfg-fw3a.h b/spaghetti-monster/anduril/cfg-fw3a.h index 4074f01..420eaeb 100644 --- a/spaghetti-monster/anduril/cfg-fw3a.h +++ b/spaghetti-monster/anduril/cfg-fw3a.h @@ -1,2 +1 @@ -// average drop across diode on this hardware -#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V +// FW3A config options for Anduril diff --git a/tk-attiny.h b/tk-attiny.h index d81468b..b3edb6d 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -61,276 +61,38 @@ #include <avr/interrupt.h> /******************** I/O pin and register layout ************************/ -#ifdef FET_7135_LAYOUT -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * OTC -|2 7|- Voltage ADC - * Star 3 -|3 6|- PWM (FET) - * GND -|4 5|- PWM (1x7135) - * ---- - */ - -#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM -#define STAR3_PIN PB4 // pin 3 - -#define CAP_PIN PB3 // pin 2, OTC -#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) -#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 - -#define PWM_PIN PB1 // pin 6, FET PWM -#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 -#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM -#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0 - -#define VOLTAGE_PIN PB2 // pin 7, voltage ADC -#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 - -//#define TEMP_DIDR ADC4D -#define TEMP_CHANNEL 0b00001111 - -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels - -#endif // FET_7135_LAYOUT - -#ifdef TRIPLEDOWN_LAYOUT -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * OTC -|2 7|- Voltage ADC - * PWM (FET) -|3 6|- PWM (6x7135) - * GND -|4 5|- PWM (1x7135) - * ---- - */ - -#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM - -#define CAP_PIN PB3 // pin 2, OTC -#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) -#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 - -#define PWM_PIN PB1 // pin 6, 6x7135 PWM -#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 -#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM -#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0 -#define FET_PWM_PIN PB4 // pin 3 -#define FET_PWM_LVL OCR1B // output compare register for PB4 - -#define VOLTAGE_PIN PB2 // pin 7, voltage ADC -#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 - -//#define TEMP_DIDR ADC4D -#define TEMP_CHANNEL 0b00001111 - -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels - -#endif // TRIPLEDOWN_LAYOUT - -#ifdef FERRERO_ROCHER_LAYOUT -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * E-switch -|2 7|- Voltage ADC - * Red LED -|3 6|- PWM - * GND -|4 5|- Green LED - * ---- - */ -// TODO: fill in this section, update Ferrero_Rocher code to use it. -#define FAST 0x23 // fast PWM channel 1 only -#define PHASE 0x21 // phase-correct PWM channel 1 only -#endif // FERRERO_ROCHER_LAYOUT - -#ifdef NANJG_LAYOUT -#define DRIVER_TYPE_DEFINED -#define STAR2_PIN PB0 -#define STAR3_PIN PB4 -#define STAR4_PIN PB3 -#define PWM_PIN PB1 -#define VOLTAGE_PIN PB2 -#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 - -#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1 - -#define FAST 0x23 // fast PWM channel 1 only -#define PHASE 0x21 // phase-correct PWM channel 1 only - -#endif // NANJG_LAYOUT - - -// Q8 driver is the same as a D4, basically -#ifdef FSM_BLF_Q8_DRIVER -#define FSM_EMISAR_D4_DRIVER -#endif - - -#ifdef FSM_EMISAR_D4_DRIVER -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * eswitch -|2 7|- - * AUX LED -|3 6|- PWM (FET) - * GND -|4 5|- PWM (1x7135) - * ---- - */ - -#define PWM_CHANNELS 2 - -#define AUXLED_PIN PB4 // pin 3 +#if 0 // placeholder -#define SWITCH_PIN PB3 // pin 2 -#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt +#elif defined(NANJG_LAYOUT) +#include "hwdef-nanjg.h" -#define PWM1_PIN PB0 // pin 5, 1x7135 PWM -#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 -#define PWM2_PIN PB1 // pin 6, FET PWM -#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#elif defined(FET_7135_LAYOUT) +#include "hwdef-FET_7135.h" -// (FIXME: remove? not used?) -#define VOLTAGE_PIN PB2 // pin 7, voltage ADC -#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 +#elif defined(TRIPLEDOWN_LAYOUT) +#include "hwdef-Tripledown.h" -//#define TEMP_DIDR ADC4D -#define TEMP_CHANNEL 0b00001111 +#elif defined(FERRERO_ROCHER_LAYOUT) +#include "hwdef-Ferrero_Rocher.h" -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels +#elif defined(FSM_BLF_GT_DRIVER) +#include "hwdef-BLF_GT.h" -#endif // ifdef FSM_EMISAR_D4_DRIVER +#elif defined(FSM_BLF_Q8_DRIVER) +#include "hwdef-BLF_Q8.h" +#elif defined(FSM_EMISAR_D4_DRIVER) +#include "hwdef-Emisar_D4.h" -#ifdef FSM_FW3A_DRIVER -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * eswitch -|2 7|- optic nerve - * FET -|3 6|- 7x7135 - * GND -|4 5|- 1x7135 - * ---- - */ - -#define PWM_CHANNELS 3 - -#define SWITCH_PIN PB3 // pin 2 -#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt - -#define PWM1_PIN PB0 // pin 5, 1x7135 PWM -#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 -#define PWM2_PIN PB1 // pin 6, FET PWM -#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 -#define PWM3_PIN PB4 // pin 3 -#define PWM3_LVL OCR1B - -#define VISION_PIN PB2 // pin 7, optic nerve -#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 - -//#define TEMP_DIDR ADC4D -#define TEMP_CHANNEL 0b00001111 - -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels - -#endif // ifdef FSM_FW3A_DRIVER - - -#ifdef FSM_BLF_GT_DRIVER -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC (unused) - * eswitch -|2 7|- Voltage divider - * AUX LED -|3 6|- Current control (buck level) - * GND -|4 5|- PWM (buck output on/off) - * ---- - */ - -#define PWM_CHANNELS 2 - -#define AUXLED_PIN PB4 // pin 3 - -#define SWITCH_PIN PB3 // pin 2 -#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt - -#define PWM1_PIN PB0 // pin 5, 1x7135 PWM -#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 -#define PWM2_PIN PB1 // pin 6, FET PWM -#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 - -#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC -#define VOLTAGE_PIN PB2 // pin 7, voltage ADC -#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2 -// 1.1V reference, left-adjust, ADC1/PB2 -//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL) -// 1.1V reference, no left-adjust, ADC1/PB2 -#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL) -#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 -#define ADC_PRSCL 0x06 // clk/64 +#elif defined(FSM_FW3A_DRIVER) +#include "hwdef-FW3A.h" -// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line) -#define ADC_44 184 -#define ADC_22 92 +#elif defined(FSM_TKSABER_DRIVER) +#include "hwdef-TK_Saber.h" -#define TEMP_CHANNEL 0b00001111 - -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels - -#endif // ifdef FSM_BLF_GT_DRIVER - - -#ifdef FSM_TKSABER_DRIVER -#define DRIVER_TYPE_DEFINED -/* - * ---- - * Reset -|1 8|- VCC - * PWM 4 (A) -|2 7|- e-switch - * PWM 3 (G) -|3 6|- PWM 2 (B) - * GND -|4 5|- PWM 1 (R) - * ---- - */ - -#define PWM_CHANNELS 4 -#define PWM1_PIN PB0 // pin 5 -#define PWM1_LVL OCR0A -#define PWM2_PIN PB1 // pin 6 -#define PWM2_LVL OCR0B -#define PWM3_PIN PB4 // pin 3 -#define PWM3_LVL OCR1B -#define PWM4_PIN PB3 // pin 2 -#define PWM4_LVL OCR1A - -#define SWITCH_PIN PB2 // pin 7 -#define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt - -#define ADC_PRSCL 0x06 // clk/64 (no need to be super fast) - -//#define TEMP_DIDR ADC4D -#define TEMP_CHANNEL 0b00001111 - -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels - -#endif // TKSABER_DRIVER - - -#ifndef DRIVER_TYPE_DEFINED +#else #error Hey, you need to define an I/O pin layout. -#endif + +#endif // no more recognized driver types #endif // TK_ATTINY_H |