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-rw-r--r--hwdef-BLF_GT.h4
-rw-r--r--hwdef-Emisar_D1Sv2.h32
-rw-r--r--hwdef-Mateminco_MF01S.h4
-rw-r--r--spaghetti-monster/fsm-adc.c4
-rw-r--r--tk-attiny.h4
5 files changed, 28 insertions, 20 deletions
diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h
index 01dbdbd..dd8d80a 100644
--- a/hwdef-BLF_GT.h
+++ b/hwdef-BLF_GT.h
@@ -34,7 +34,9 @@
#ifndef VOLTAGE_PIN
#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define VOLTAGE_ADC ADC1D // Digital input disable bit corresponding with PB2
+// inherited from tk-attiny.h
+//#define VOLTAGE_ADC_DIDR DIDR0 // DIDR for ADC1
// 1.1V reference, left-adjust, ADC1/PB2
//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
// 1.1V reference, no left-adjust, ADC1/PB2
diff --git a/hwdef-Emisar_D1Sv2.h b/hwdef-Emisar_D1Sv2.h
index 5912ea8..856643b 100644
--- a/hwdef-Emisar_D1Sv2.h
+++ b/hwdef-Emisar_D1Sv2.h
@@ -4,11 +4,11 @@
/* Emisar D1Sv2 driver layout (attiny1634)
*
* Pin / Name / Function
- * 1 PA6 red aux LED (PWM1B)
- * 2 PA5 green aux LED (PWM0B)
- * 3 PA4 blue aux LED
- * 4 PA3 battery voltage (ADC0)
- * 5 PA2 (none)
+ * 1 PA6 (none) (PWM1B) (reserved for DD drivers)
+ * 2 PA5 R: red aux LED (PWM0B)
+ * 3 PA4 G: green aux LED
+ * 4 PA3 B: blue aux LED
+ * 5 PA2 (none) (reserved for L: button LED (on some models))
* 6 PA1 (none)
* 7 PA0 (none)
* 8 GND GND
@@ -21,7 +21,7 @@
* 15 PC0 (none) PWM0A
* 16 PB3 main LED PWM (PWM1A)
* 17 PB2 MISO
- * 18 PB1 MOSI
+ * 18 PB1 MOSI / battery voltage (ADC6)
* 19 PB0 Opamp power
* 20 PA7 e-switch (PCINT7)
* ADC12 thermal sensor
@@ -54,22 +54,22 @@
#define LED_ENABLE_PIN PB0 // pin 19, Opamp power
#define LED_ENABLE_PORT PORTB // control port for PB0
-//#define PWM2_PIN PB0 // pin 19, Opamp power
-// FIXME:
-//#define PWM2_LVL OCR1B // OCR1B is the output compare register for PB1
#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
-#define VOLTAGE_PIN PA3 // Pin 4 / PA3 / ADC0
-#define VOLTAGE_ADC_DIDR ADC0D // digital input disable pin for PA3
+#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D
// DS tables 19-3, 19-4
// Bit 7 6 5 4 3 2 1 0
// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
-// MUX[3:0] = 0, 0, 0, 0 for ADC0 / PA3
+// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
// divided by ...
// REFS[1:0] = 1, 0 for internal 1.1V reference
// other bits reserved
-#define ADMUX_VOLTAGE_DIVIDER 0b10000000
+#define ADMUX_VOLTAGE_DIVIDER 0b10000110
#define ADC_PRSCL 0x06 // clk/64
// Raw ADC readings at 4.4V and 2.2V
@@ -87,9 +87,9 @@
#define TEMP_CHANNEL 0b00001111
// this light has aux LEDs under the optic
-#define AUXLED_R_PIN PA6 // pin 1
-#define AUXLED_G_PIN PA5 // pin 2
-#define AUXLED_B_PIN PA4 // pin 3
+#define AUXLED_R_PIN PA5 // pin 2
+#define AUXLED_G_PIN PA4 // pin 3
+#define AUXLED_B_PIN PA3 // pin 4
#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC
#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC
#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC
diff --git a/hwdef-Mateminco_MF01S.h b/hwdef-Mateminco_MF01S.h
index ab1c5bf..ad6194c 100644
--- a/hwdef-Mateminco_MF01S.h
+++ b/hwdef-Mateminco_MF01S.h
@@ -34,7 +34,9 @@
#ifndef VOLTAGE_PIN
#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define VOLTAGE_ADC ADC1D // Digital input disable bit corresponding with PB2
+// inherited from tk-attiny.h
+//#define VOLTAGE_ADC_DIDR DIDR0 // DIDR for ADC1
// 1.1V reference, left-adjust, ADC1/PB2
//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
// 1.1V reference, no left-adjust, ADC1/PB2
diff --git a/spaghetti-monster/fsm-adc.c b/spaghetti-monster/fsm-adc.c
index 6832e32..a5507a9 100644
--- a/spaghetti-monster/fsm-adc.c
+++ b/spaghetti-monster/fsm-adc.c
@@ -69,10 +69,10 @@ inline void ADC_on()
set_admux_voltage();
#ifdef USE_VOLTAGE_DIVIDER
// disable digital input on divider pin to reduce power consumption
- DIDR0 |= (1 << VOLTAGE_ADC_DIDR);
+ VOLTAGE_ADC_DIDR |= (1 << VOLTAGE_ADC);
#else
// disable digital input on VCC pin to reduce power consumption
- //DIDR0 |= (1 << ADC_DIDR); // FIXME: unsure how to handle for VCC pin
+ //VOLTAGE_ADC_DIDR |= (1 << VOLTAGE_ADC); // FIXME: unsure how to handle for VCC pin
#endif
#if (ATTINY == 1634)
ACSRA |= (1 << ACD); // turn off analog comparator to save power
diff --git a/tk-attiny.h b/tk-attiny.h
index 947a87c..4d0c7e0 100644
--- a/tk-attiny.h
+++ b/tk-attiny.h
@@ -34,6 +34,7 @@
#define ADMUX_VCC 0b00001100
#define DELAY_ZERO_TIME 252
#define SWITCH_PORT PINB // PINA or PINB or PINC
+ #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
#elif (ATTINY == 25)
// TODO: Use 6.4 MHz instead of 8 MHz?
#define F_CPU 8000000UL
@@ -44,6 +45,7 @@
#define ADMUX_THERM 0b10001111
#define DELAY_ZERO_TIME 1020
#define SWITCH_PORT PINB // PINA or PINB or PINC
+ #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
#elif (ATTINY == 85)
// TODO: Use 6.4 MHz instead of 8 MHz?
#define F_CPU 8000000UL
@@ -56,6 +58,7 @@
#define ADMUX_THERM 0b10001111
#define DELAY_ZERO_TIME 1020
#define SWITCH_PORT PINB // PINA or PINB or PINC
+ #define VOLTAGE_ADC_DIDR DIDR0 // this MCU only has one DIDR
#elif (ATTINY == 1634)
#define F_CPU 8000000UL
#define V_REF REFS1
@@ -66,6 +69,7 @@
#define ADMUX_THERM 0b10001110
#define DELAY_ZERO_TIME 1020
//#define SWITCH_PORT PINA // set this in hwdef
+ //#define VOLTAGE_ADC_DIDR DIDR0 // set this in hwdef
#else
#error Hey, you need to define ATTINY.
#endif
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