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-rw-r--r--hwdef-BLF_GT.h40
-rw-r--r--hwdef-BLF_Q8.h16
-rw-r--r--hwdef-Emisar_D4.h36
-rw-r--r--hwdef-Emisar_D4S.h10
-rw-r--r--hwdef-FET_7135.h32
-rw-r--r--hwdef-FW3A.h35
-rw-r--r--hwdef-Ferrero_Rocher.h11
-rw-r--r--hwdef-TK_Saber.h33
-rw-r--r--hwdef-Tripledown.h33
-rw-r--r--hwdef-nanjg.h16
-rw-r--r--spaghetti-monster/anduril/anduril.c101
-rw-r--r--spaghetti-monster/anduril/cfg-blf-gt.h24
-rw-r--r--spaghetti-monster/anduril/cfg-blf-q8.h9
-rw-r--r--spaghetti-monster/anduril/cfg-emisar-d4.h1
-rw-r--r--spaghetti-monster/anduril/cfg-fw3a.h1
-rw-r--r--tk-attiny.h289
16 files changed, 373 insertions, 314 deletions
diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h
new file mode 100644
index 0000000..1a05741
--- /dev/null
+++ b/hwdef-BLF_GT.h
@@ -0,0 +1,40 @@
+/* BLF GT driver layout
+ * ----
+ * Reset -|1 8|- VCC (unused)
+ * eswitch -|2 7|- Voltage divider
+ * AUX LED -|3 6|- Current control (buck level)
+ * GND -|4 5|- PWM (buck output on/off)
+ * ----
+ */
+
+#define PWM_CHANNELS 2
+
+#define AUXLED_PIN PB4 // pin 3
+
+#define SWITCH_PIN PB3 // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
+#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
+#define PWM2_PIN PB1 // pin 6, FET PWM
+#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
+
+#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC
+#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
+#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
+// 1.1V reference, left-adjust, ADC1/PB2
+//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
+// 1.1V reference, no left-adjust, ADC1/PB2
+#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
+#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
+#define ADC_44 184
+#define ADC_22 92
+
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-BLF_Q8.h b/hwdef-BLF_Q8.h
new file mode 100644
index 0000000..f00c392
--- /dev/null
+++ b/hwdef-BLF_Q8.h
@@ -0,0 +1,16 @@
+/* BLF Q8 driver layout
+ */
+// Q8 driver is the same as a D4, basically
+#include "hwdef-Emisar_D4.h"
+
+// ... except the Q8 has a lighted button
+#ifndef AUXLED_PIN
+#define AUXLED_PIN PB4 // pin 3
+#endif
+
+// average drop across diode on this hardware
+#ifdef VOLTAGE_FUDGE_FACTOR
+#undef VOLTAGE_FUDGE_FACTOR
+#endif
+#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
+
diff --git a/hwdef-Emisar_D4.h b/hwdef-Emisar_D4.h
new file mode 100644
index 0000000..105d3b9
--- /dev/null
+++ b/hwdef-Emisar_D4.h
@@ -0,0 +1,36 @@
+/* Emisar D4 driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * eswitch -|2 7|-
+ * AUX LED -|3 6|- PWM (FET)
+ * GND -|4 5|- PWM (1x7135)
+ * ----
+ */
+
+#define PWM_CHANNELS 2
+
+#define AUXLED_PIN PB4 // pin 3
+
+#define SWITCH_PIN PB3 // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
+#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
+#define PWM2_PIN PB1 // pin 6, FET PWM
+#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
+
+// (FIXME: remove? not used?)
+#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
+#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+// average drop across diode on this hardware
+#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
+
+//#define TEMP_DIDR ADC4D
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-Emisar_D4S.h b/hwdef-Emisar_D4S.h
new file mode 100644
index 0000000..47ef1eb
--- /dev/null
+++ b/hwdef-Emisar_D4S.h
@@ -0,0 +1,10 @@
+/* Emisar D4S driver layout
+ */
+// same as a D4, basically
+#include "hwdef-Emisar_D4.h"
+
+// ... except the D4S has aux LEDs under the optic
+#ifndef AUXLED_PIN
+#define AUXLED_PIN PB4 // pin 3
+#endif
+
diff --git a/hwdef-FET_7135.h b/hwdef-FET_7135.h
new file mode 100644
index 0000000..58df7b2
--- /dev/null
+++ b/hwdef-FET_7135.h
@@ -0,0 +1,32 @@
+/* FET + 7135 driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * OTC -|2 7|- Voltage ADC
+ * Star 3 -|3 6|- PWM (FET)
+ * GND -|4 5|- PWM (1x7135)
+ * ----
+ */
+
+#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM
+#define STAR3_PIN PB4 // pin 3
+
+#define CAP_PIN PB3 // pin 2, OTC
+#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4)
+#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3
+
+#define PWM_PIN PB1 // pin 6, FET PWM
+#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
+#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM
+#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0
+
+#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
+#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+//#define TEMP_DIDR ADC4D
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
new file mode 100644
index 0000000..5e253c7
--- /dev/null
+++ b/hwdef-FW3A.h
@@ -0,0 +1,35 @@
+/* BLF/TLF FW3A driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * eswitch -|2 7|- optic nerve
+ * FET -|3 6|- 7x7135
+ * GND -|4 5|- 1x7135
+ * ----
+ */
+
+#define PWM_CHANNELS 3
+
+#define SWITCH_PIN PB3 // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+
+#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
+#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
+#define PWM2_PIN PB1 // pin 6, FET PWM
+#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
+#define PWM3_PIN PB4 // pin 3
+#define PWM3_LVL OCR1B
+
+#define VISION_PIN PB2 // pin 7, optic nerve
+#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+// average drop across diode on this hardware
+#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
+
+//#define TEMP_DIDR ADC4D
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-Ferrero_Rocher.h b/hwdef-Ferrero_Rocher.h
new file mode 100644
index 0000000..a46f19d
--- /dev/null
+++ b/hwdef-Ferrero_Rocher.h
@@ -0,0 +1,11 @@
+/* Ferrero Rocher driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * E-switch -|2 7|- Voltage ADC
+ * Red LED -|3 6|- PWM
+ * GND -|4 5|- Green LED
+ * ----
+ */
+// TODO: fill in this section, update Ferrero_Rocher code to use it.
+#define FAST 0x23 // fast PWM channel 1 only
+#define PHASE 0x21 // phase-correct PWM channel 1 only
diff --git a/hwdef-TK_Saber.h b/hwdef-TK_Saber.h
new file mode 100644
index 0000000..e90d5dd
--- /dev/null
+++ b/hwdef-TK_Saber.h
@@ -0,0 +1,33 @@
+/* TK 4-color lightsaber driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * PWM 4 (A) -|2 7|- e-switch
+ * PWM 3 (G) -|3 6|- PWM 2 (B)
+ * GND -|4 5|- PWM 1 (R)
+ * ----
+ */
+
+#define PWM_CHANNELS 4
+#define PWM1_PIN PB0 // pin 5
+#define PWM1_LVL OCR0A
+#define PWM2_PIN PB1 // pin 6
+#define PWM2_LVL OCR0B
+#define PWM3_PIN PB4 // pin 3
+#define PWM3_LVL OCR1B
+#define PWM4_PIN PB3 // pin 2
+#define PWM4_LVL OCR1A
+
+#define SWITCH_PIN PB2 // pin 7
+#define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt
+
+#define ADC_PRSCL 0x06 // clk/64 (no need to be super fast)
+
+// average drop across diode on this hardware
+#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
+
+//#define TEMP_DIDR ADC4D
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-Tripledown.h b/hwdef-Tripledown.h
new file mode 100644
index 0000000..4676e69
--- /dev/null
+++ b/hwdef-Tripledown.h
@@ -0,0 +1,33 @@
+/* Tripledown driver layout
+ * ----
+ * Reset -|1 8|- VCC
+ * OTC -|2 7|- Voltage ADC
+ * PWM (FET) -|3 6|- PWM (6x7135)
+ * GND -|4 5|- PWM (1x7135)
+ * ----
+ */
+
+#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM
+
+#define CAP_PIN PB3 // pin 2, OTC
+#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4)
+#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3
+
+#define PWM_PIN PB1 // pin 6, 6x7135 PWM
+#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
+#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM
+#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0
+#define FET_PWM_PIN PB4 // pin 3
+#define FET_PWM_LVL OCR1B // output compare register for PB4
+
+#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
+#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+//#define TEMP_DIDR ADC4D
+#define TEMP_CHANNEL 0b00001111
+
+#define FAST 0xA3 // fast PWM both channels
+#define PHASE 0xA1 // phase-correct PWM both channels
+
diff --git a/hwdef-nanjg.h b/hwdef-nanjg.h
new file mode 100644
index 0000000..add10d1
--- /dev/null
+++ b/hwdef-nanjg.h
@@ -0,0 +1,16 @@
+/* NANJG driver layout
+ */
+#define STAR2_PIN PB0
+#define STAR3_PIN PB4
+#define STAR4_PIN PB3
+#define PWM_PIN PB1
+#define VOLTAGE_PIN PB2
+#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#define ADC_PRSCL 0x06 // clk/64
+
+#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
+
+#define FAST 0x23 // fast PWM channel 1 only
+#define PHASE 0x21 // phase-correct PWM channel 1 only
+
diff --git a/spaghetti-monster/anduril/anduril.c b/spaghetti-monster/anduril/anduril.c
index 2fec5b4..a79220b 100644
--- a/spaghetti-monster/anduril/anduril.c
+++ b/spaghetti-monster/anduril/anduril.c
@@ -26,7 +26,8 @@
//#define FSM_FW3A_DRIVER
//#define FSM_BLF_GT_DRIVER
-#define USE_LVP
+#define USE_LVP // FIXME: won't build when this option is turned off
+
#define USE_THERMAL_REGULATION
#define DEFAULT_THERM_CEIL 50
#define MIN_THERM_STEPDOWN MAX_1x7135 // lowest value it'll step down to
@@ -35,19 +36,35 @@
#else
#define THERM_DOUBLE_SPEED_LEVEL (RAMP_LENGTH*4/5) // throttle back faster when high
#endif
-#define USE_SET_LEVEL_GRADUALLY
+#ifdef USE_THERMAL_REGULATION
+#define USE_SET_LEVEL_GRADUALLY // isn't used except for thermal adjustments
+#endif
+
+// short blips while ramping
#define BLINK_AT_CHANNEL_BOUNDARIES
//#define BLINK_AT_RAMP_FLOOR
#define BLINK_AT_RAMP_CEILING
-//#define BLINK_AT_STEPS
+//#define BLINK_AT_STEPS // whenever a discrete ramp mode is passed in smooth mode
+
+// ramp down via regular button hold if a ramp-up ended <1s ago
+// ("hold, release, hold" ramps down instead of up)
+#define USE_REVERSING
+
+// battery readout style (pick one)
#define BATTCHECK_VpT
+//#define BATTCHECK_8bars // FIXME: breaks build
+//#define BATTCHECK_4bars // FIXME: breaks build
+
+// enable/disable various modes
#define USE_LIGHTNING_MODE
#define USE_CANDLE_MODE
+#define USE_MUGGLE_MODE
+
#define GOODNIGHT_TIME 60 // minutes (approximately)
#define GOODNIGHT_LEVEL 24 // ~11 lm
-#define USE_REVERSING
+
+// dual-switch support (second switch is a tail clicky)
//#define START_AT_MEMORIZED_LEVEL
-#define USE_MUGGLE_MODE
/********* Configure SpaghettiMonster *********/
#define USE_DELAY_ZERO
@@ -62,45 +79,29 @@
#else
#define MAX_CLICKS 5
#endif
-#define USE_IDLE_MODE
+#define USE_IDLE_MODE // reduce power use while awake and no tasks are pending
#define USE_DYNAMIC_UNDERCLOCKING // cut clock speed at very low modes for better efficiency
+// full FET strobe can be a bit much... use max regulated level instead,
+// if there's a bright enough regulated level
+#ifdef MAX_Nx7135
+#define STROBE_BRIGHTNESS MAX_Nx7135
+#else
+#define STROBE_BRIGHTNESS MAX_LEVEL
+#endif
+
// specific settings for known driver types
-#ifdef FSM_BLF_Q8_DRIVER
-#define USE_INDICATOR_LED
-#define USE_INDICATOR_LED_WHILE_RAMPING
-#define TICK_DURING_STANDBY
-#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
-
-#elif defined(FSM_EMISAR_D4S_DRIVER)
-#define USE_INDICATOR_LED
-#define TICK_DURING_STANDBY
-#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
-#define RAMP_SMOOTH_CEIL (MAX_LEVEL*4/5)
-#undef MIN_THERM_STEPDOWN // this should be lower, because 3x7135 instead of 1x7135
-#define MIN_THERM_STEPDOWN 60 // lowest value it'll step down to
-#undef THERM_DOUBLE_SPEED_LEVEL // this should be lower too, because this light is a hot rod
-#define THERM_DOUBLE_SPEED_LEVEL (RAMP_LENGTH*2/3) // throttle back faster when high
+#if defined(FSM_BLF_GT_DRIVER)
+#include "cfg-blf-gt.h"
+
+#elif FSM_BLF_Q8_DRIVER
+#include "cfg-blf-q8.h"
#elif defined(FSM_EMISAR_D4_DRIVER)
-#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
+#include "cfg-emisar-d4.h"
#elif defined(FSM_FW3A_DRIVER)
-#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
-
-#elif defined(FSM_BLF_GT_DRIVER)
-#define USE_INDICATOR_LED
-#define USE_INDICATOR_LED_WHILE_RAMPING
-#define TICK_DURING_STANDBY
-#undef BLINK_AT_CHANNEL_BOUNDARIES
-#undef BLINK_AT_RAMP_CEILING
-#undef BLINK_AT_RAMP_FLOOR
-//#undef USE_SET_LEVEL_GRADUALLY
-#define RAMP_SMOOTH_FLOOR 1
-#define RAMP_SMOOTH_CEIL POWER_80PX
-#define RAMP_DISCRETE_FLOOR 1
-#define RAMP_DISCRETE_CEIL POWER_80PX
-#define RAMP_DISCRETE_STEPS 7
+#include "cfg-fw3a.h"
#endif
@@ -137,14 +138,6 @@
#endif
#define NUM_STROBES (NUM_STROBES_BASE+ADD_LIGHTNING_STROBE+ADD_CANDLE_MODE)
-// full FET strobe can be a bit much... use max regulated level instead,
-// if there's a bright enough regulated level
-#ifdef MAX_Nx7135
-#define STROBE_BRIGHTNESS MAX_Nx7135
-#else
-#define STROBE_BRIGHTNESS MAX_LEVEL
-#endif
-
#include "spaghetti-monster.h"
@@ -236,13 +229,12 @@ uint8_t ramp_discrete_step_size; // don't set this
#ifdef USE_INDICATOR_LED
// bits 2-3 control lockout mode
// bits 0-1 control "off" mode
-// modes are: 0=off, 1=low, 2=high
-// (TODO: 3=blinking)
+// modes are: 0=off, 1=low, 2=high, 3=blinking (if TICK_DURING_STANDBY enabled)
#ifdef FSM_EMISAR_D4S_DRIVER
uint8_t indicator_led_mode = (3<<2) + 1;
#else
-uint8_t indicator_led_mode = (1<<2) + 2;
-//uint8_t indicator_led_mode = (2<<2) + 1;
+//uint8_t indicator_led_mode = (1<<2) + 2;
+uint8_t indicator_led_mode = (2<<2) + 1;
#endif
#endif
@@ -686,6 +678,9 @@ uint8_t strobe_state(EventPtr event, uint16_t arg) {
// (maybe I should just make it nonvolatile?)
uint8_t st = strobe_type;
#ifdef USE_CANDLE_MODE
+ // FIXME: make candle variance magnitude a compile-time option,
+ // since 20 is sometimes too much or too little,
+ // depending on the driver type and ramp shape
//#define MAX_CANDLE_LEVEL (RAMP_SIZE-8-6-4)
#define MAX_CANDLE_LEVEL (RAMP_SIZE/2)
static uint8_t candle_wave1 = 0;
@@ -969,6 +964,8 @@ uint8_t lockout_state(EventPtr event, uint16_t arg) {
// momentary(ish) moon mode during lockout
// not all presses will be counted;
// it depends on what is in the master event_sequences table
+ // FIXME: maybe do this only if arg == 0?
+ // (so it'll only get turned on once, instead of every frame)
uint8_t last = 0;
for(uint8_t i=0; pgm_read_byte(event + i) && (i<EV_MAX_LEN); i++)
last = pgm_read_byte(event + i);
@@ -1032,6 +1029,12 @@ uint8_t lockout_state(EventPtr event, uint16_t arg) {
}
// click, click, hold: rotate through indicator LED modes (off mode)
else if (event == EV_click3_hold) {
+ #ifndef USE_INDICATOR_LED_WHILE_RAMPING
+ // if main LED obscures aux LEDs, turn it off
+ // FIXME: might not work, since it was turned on just a few clock
+ // cycles ago at beginning of this function
+ set_level(0);
+ #endif
#ifdef TICK_DURING_STANDBY
uint8_t mode = (arg >> 5) & 3;
#else
diff --git a/spaghetti-monster/anduril/cfg-blf-gt.h b/spaghetti-monster/anduril/cfg-blf-gt.h
new file mode 100644
index 0000000..904668a
--- /dev/null
+++ b/spaghetti-monster/anduril/cfg-blf-gt.h
@@ -0,0 +1,24 @@
+// BLF GT config options for Anduril
+
+// the button lights up
+#define USE_INDICATOR_LED
+// the button is visible while main LEDs are on
+#define USE_INDICATOR_LED_WHILE_RAMPING
+// enable blinking indicator LED while off
+#define TICK_DURING_STANDBY
+
+// don't blink during ramp, it's irrelevant and annoying on this light
+#undef BLINK_AT_CHANNEL_BOUNDARIES
+#undef BLINK_AT_RAMP_CEILING
+#undef BLINK_AT_RAMP_FLOOR
+
+//#undef USE_SET_LEVEL_GRADUALLY
+
+// use 2.0 A as the ceiling, 2.5 A only for turbo
+// start both ramps at the bottom; even moon throws a long way on the GT
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL POWER_80PX
+#define RAMP_DISCRETE_FLOOR 1
+#define RAMP_DISCRETE_CEIL POWER_80PX
+#define RAMP_DISCRETE_STEPS 7
+
diff --git a/spaghetti-monster/anduril/cfg-blf-q8.h b/spaghetti-monster/anduril/cfg-blf-q8.h
new file mode 100644
index 0000000..929fb55
--- /dev/null
+++ b/spaghetti-monster/anduril/cfg-blf-q8.h
@@ -0,0 +1,9 @@
+// BLF Q8 config options for Anduril
+
+// the button lights up
+#define USE_INDICATOR_LED
+// the button is visible while main LEDs are on
+#define USE_INDICATOR_LED_WHILE_RAMPING
+// enable blinking indicator LED while off
+#define TICK_DURING_STANDBY
+
diff --git a/spaghetti-monster/anduril/cfg-emisar-d4.h b/spaghetti-monster/anduril/cfg-emisar-d4.h
new file mode 100644
index 0000000..5421110
--- /dev/null
+++ b/spaghetti-monster/anduril/cfg-emisar-d4.h
@@ -0,0 +1 @@
+// Emisar D4 config options for Anduril
diff --git a/spaghetti-monster/anduril/cfg-fw3a.h b/spaghetti-monster/anduril/cfg-fw3a.h
new file mode 100644
index 0000000..420eaeb
--- /dev/null
+++ b/spaghetti-monster/anduril/cfg-fw3a.h
@@ -0,0 +1 @@
+// FW3A config options for Anduril
diff --git a/tk-attiny.h b/tk-attiny.h
index 347acc7..4973ed5 100644
--- a/tk-attiny.h
+++ b/tk-attiny.h
@@ -61,282 +61,41 @@
#include <avr/interrupt.h>
/******************** I/O pin and register layout ************************/
-#ifdef FET_7135_LAYOUT
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * OTC -|2 7|- Voltage ADC
- * Star 3 -|3 6|- PWM (FET)
- * GND -|4 5|- PWM (1x7135)
- * ----
- */
-
-#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM
-#define STAR3_PIN PB4 // pin 3
-
-#define CAP_PIN PB3 // pin 2, OTC
-#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4)
-#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3
-
-#define PWM_PIN PB1 // pin 6, FET PWM
-#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
-#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM
-#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0
-
-#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
-
-//#define TEMP_DIDR ADC4D
-#define TEMP_CHANNEL 0b00001111
-
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
-
-#endif // FET_7135_LAYOUT
-
-#ifdef TRIPLEDOWN_LAYOUT
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * OTC -|2 7|- Voltage ADC
- * PWM (FET) -|3 6|- PWM (6x7135)
- * GND -|4 5|- PWM (1x7135)
- * ----
- */
-
-#define STAR2_PIN PB0 // If this pin isn't used for ALT_PWM
-
-#define CAP_PIN PB3 // pin 2, OTC
-#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4)
-#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3
-
-#define PWM_PIN PB1 // pin 6, 6x7135 PWM
-#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
-#define ALT_PWM_PIN PB0 // pin 5, 1x7135 PWM
-#define ALT_PWM_LVL OCR0A // OCR0A is the output compare register for PB0
-#define FET_PWM_PIN PB4 // pin 3
-#define FET_PWM_LVL OCR1B // output compare register for PB4
-
-#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
-
-//#define TEMP_DIDR ADC4D
-#define TEMP_CHANNEL 0b00001111
-
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
-
-#endif // TRIPLEDOWN_LAYOUT
-
-#ifdef FERRERO_ROCHER_LAYOUT
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * E-switch -|2 7|- Voltage ADC
- * Red LED -|3 6|- PWM
- * GND -|4 5|- Green LED
- * ----
- */
-// TODO: fill in this section, update Ferrero_Rocher code to use it.
-#define FAST 0x23 // fast PWM channel 1 only
-#define PHASE 0x21 // phase-correct PWM channel 1 only
-#endif // FERRERO_ROCHER_LAYOUT
-
-#ifdef NANJG_LAYOUT
-#define DRIVER_TYPE_DEFINED
-#define STAR2_PIN PB0
-#define STAR3_PIN PB4
-#define STAR4_PIN PB3
-#define PWM_PIN PB1
-#define VOLTAGE_PIN PB2
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
-
-#define PWM_LVL OCR0B // OCR0B is the output compare register for PB1
-
-#define FAST 0x23 // fast PWM channel 1 only
-#define PHASE 0x21 // phase-correct PWM channel 1 only
-
-#endif // NANJG_LAYOUT
-
-
-// Q8 driver is the same as a D4, basically
-#ifdef FSM_BLF_Q8_DRIVER
-#define FSM_EMISAR_D4_DRIVER
-#endif
-
-
-// D4S driver is the same as a D4, basically
-#ifdef FSM_EMISAR_D4S_DRIVER
-#define FSM_EMISAR_D4_DRIVER
-#endif
-
-
-#ifdef FSM_EMISAR_D4_DRIVER
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * eswitch -|2 7|-
- * AUX LED -|3 6|- PWM (FET)
- * GND -|4 5|- PWM (1x7135)
- * ----
- */
+#if 0 // placeholder
-#define PWM_CHANNELS 2
+#elif defined(NANJG_LAYOUT)
+#include "hwdef-nanjg.h"
-#define AUXLED_PIN PB4 // pin 3
+#elif defined(FET_7135_LAYOUT)
+#include "hwdef-FET_7135.h"
-#define SWITCH_PIN PB3 // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#elif defined(TRIPLEDOWN_LAYOUT)
+#include "hwdef-Tripledown.h"
-#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
-#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
-#define PWM2_PIN PB1 // pin 6, FET PWM
-#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
+#elif defined(FERRERO_ROCHER_LAYOUT)
+#include "hwdef-Ferrero_Rocher.h"
-// (FIXME: remove? not used?)
-#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
+#elif defined(FSM_BLF_GT_DRIVER)
+#include "hwdef-BLF_GT.h"
-//#define TEMP_DIDR ADC4D
-#define TEMP_CHANNEL 0b00001111
+#elif defined(FSM_BLF_Q8_DRIVER)
+#include "hwdef-BLF_Q8.h"
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
+#elif defined(FSM_EMISAR_D4_DRIVER)
+#include "hwdef-Emisar_D4.h"
-#endif // ifdef FSM_EMISAR_D4_DRIVER
+#elif defined(FSM_EMISAR_D4S_DRIVER)
+#include "hwdef-Emisar_D4S.h"
+#elif defined(FSM_FW3A_DRIVER)
+#include "hwdef-FW3A.h"
-#ifdef FSM_FW3A_DRIVER
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * eswitch -|2 7|- optic nerve
- * FET -|3 6|- 7x7135
- * GND -|4 5|- 1x7135
- * ----
- */
-
-#define PWM_CHANNELS 3
-
-#define SWITCH_PIN PB3 // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-
-#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
-#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
-#define PWM2_PIN PB1 // pin 6, FET PWM
-#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
-#define PWM3_PIN PB4 // pin 3
-#define PWM3_LVL OCR1B
-
-#define VISION_PIN PB2 // pin 7, optic nerve
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
-
-//#define TEMP_DIDR ADC4D
-#define TEMP_CHANNEL 0b00001111
-
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
-
-#endif // ifdef FSM_FW3A_DRIVER
-
-
-#ifdef FSM_BLF_GT_DRIVER
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC (unused)
- * eswitch -|2 7|- Voltage divider
- * AUX LED -|3 6|- Current control (buck level)
- * GND -|4 5|- PWM (buck output on/off)
- * ----
- */
-
-#define PWM_CHANNELS 2
-
-#define AUXLED_PIN PB4 // pin 3
-
-#define SWITCH_PIN PB3 // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-
-#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
-#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
-#define PWM2_PIN PB1 // pin 6, FET PWM
-#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
-
-#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC
-#define VOLTAGE_PIN PB2 // pin 7, voltage ADC
-#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
-// 1.1V reference, left-adjust, ADC1/PB2
-//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
-// 1.1V reference, no left-adjust, ADC1/PB2
-#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
-#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL 0x06 // clk/64
+#elif defined(FSM_TKSABER_DRIVER)
+#include "hwdef-TK_Saber.h"
-// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
-#define ADC_44 184
-#define ADC_22 92
-
-#define TEMP_CHANNEL 0b00001111
-
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
-
-#endif // ifdef FSM_BLF_GT_DRIVER
-
-
-#ifdef FSM_TKSABER_DRIVER
-#define DRIVER_TYPE_DEFINED
-/*
- * ----
- * Reset -|1 8|- VCC
- * PWM 4 (A) -|2 7|- e-switch
- * PWM 3 (G) -|3 6|- PWM 2 (B)
- * GND -|4 5|- PWM 1 (R)
- * ----
- */
-
-#define PWM_CHANNELS 4
-#define PWM1_PIN PB0 // pin 5
-#define PWM1_LVL OCR0A
-#define PWM2_PIN PB1 // pin 6
-#define PWM2_LVL OCR0B
-#define PWM3_PIN PB4 // pin 3
-#define PWM3_LVL OCR1B
-#define PWM4_PIN PB3 // pin 2
-#define PWM4_LVL OCR1A
-
-#define SWITCH_PIN PB2 // pin 7
-#define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt
-
-#define ADC_PRSCL 0x06 // clk/64 (no need to be super fast)
-
-//#define TEMP_DIDR ADC4D
-#define TEMP_CHANNEL 0b00001111
-
-#define FAST 0xA3 // fast PWM both channels
-#define PHASE 0xA1 // phase-correct PWM both channels
-
-#endif // TKSABER_DRIVER
-
-
-#ifndef DRIVER_TYPE_DEFINED
+#else
#error Hey, you need to define an I/O pin layout.
-#endif
+
+#endif // no more recognized driver types
#endif // TK_ATTINY_H
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