aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--hwdef-blf-lt1-t1616.h2
-rw-r--r--hwdef-blf-lt1.c10
-rw-r--r--hwdef-blf-lt1.h11
-rw-r--r--hwdef-emisar-d4k-3ch.c12
-rw-r--r--hwdef-emisar-d4k-3ch.h10
-rw-r--r--hwdef-noctigon-m44.h2
6 files changed, 37 insertions, 10 deletions
diff --git a/hwdef-blf-lt1-t1616.h b/hwdef-blf-lt1-t1616.h
index a28ee0f..7c1f10b 100644
--- a/hwdef-blf-lt1-t1616.h
+++ b/hwdef-blf-lt1-t1616.h
@@ -68,6 +68,8 @@ enum channel_modes_e {
#define DSM_INTFLAGS TCA0.SINGLE.INTFLAGS
#define DSM_OVF_bm TCA_SINGLE_OVF_bm
+#define DELAY_FACTOR 90 // less time in delay() because more time spent in interrupts
+
// warm LEDs
uint16_t ch1_dsm_lvl;
uint8_t ch1_pwm, ch1_dsm;
diff --git a/hwdef-blf-lt1.c b/hwdef-blf-lt1.c
index 8a8af52..8a4c0e1 100644
--- a/hwdef-blf-lt1.c
+++ b/hwdef-blf-lt1.c
@@ -52,7 +52,7 @@ Channel channels[] = {
void set_level_zero() {
// disable timer 0 overflow interrupt
// (helps improve button press handling from Off state)
- TIMSK &= ~(1 << TOIE0);
+ DSM_INTCTRL &= ~DSM_OVF_bm;
// turn off all LEDs
ch1_dsm_lvl = 0;
@@ -72,14 +72,14 @@ void set_hw_levels(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
CH1_PWM = ch1_pwm = ch1 >> 7;
CH2_PWM = ch2_pwm = ch2 >> 7;
- // enable timer 0 overflow interrupt so DSM can work
- TIMSK |= (1 << TOIE0);
+ // enable timer overflow interrupt so DSM can work
+ DSM_INTCTRL |= DSM_OVF_bm;
}
// delta-sigma modulation of PWM outputs
-// happens on each Timer0 overflow (every 512 cpu clock cycles)
+// happens on each Timer overflow (every 512 cpu clock cycles)
// uses 8-bit pwm w/ 7-bit dsm (0b 0PPP PPPP PDDD DDDD)
-ISR(TIMER0_OVF_vect) {
+ISR(DSM_vect) {
// set new hardware values first,
// for best timing (reduce effect of interrupt jitter)
CH1_PWM = ch1_pwm;
diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h
index 8fce09f..b113fd4 100644
--- a/hwdef-blf-lt1.h
+++ b/hwdef-blf-lt1.h
@@ -56,6 +56,13 @@ enum channel_modes_e {
#define PWM_TOP_INIT 255
#define DSM_TOP (255<<7) // 15-bit resolution leaves 1 bit for carry
+// timer interrupt for DSM
+#define DSM_vect TIMER0_OVF_vect
+#define DSM_INTCTRL TIMSK
+#define DSM_OVF_bm (1<<TOIE0)
+
+#define DELAY_FACTOR 90 // less time in delay() because more time spent in interrupts
+
// warm LEDs
uint16_t ch1_dsm_lvl;
uint8_t ch1_pwm, ch1_dsm;
@@ -94,8 +101,8 @@ inline void hwdef_setup() {
TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...)
TCCR0A = PHASE;
- // enable timer 0 overflow interrupt for DSM purposes
- //TIMSK |= (1 << TOIE0); // moved to hwdef.c functions instead
+ // enable timer overflow interrupt for DSM purposes
+ //DSM_INTCTRL |= DSM_OVF_bm; // moved to hwdef.c functions instead
// configure e-switch
PORTB = (1 << SWITCH_PIN); // e-switch is the only input
diff --git a/hwdef-emisar-d4k-3ch.c b/hwdef-emisar-d4k-3ch.c
index ba6643d..e35af08 100644
--- a/hwdef-emisar-d4k-3ch.c
+++ b/hwdef-emisar-d4k-3ch.c
@@ -78,6 +78,10 @@ StatePtr channel_3H_modes[NUM_CHANNEL_MODES] = {
};
void set_level_zero() {
+ // disable timer overflow interrupt
+ // (helps improve button press handling from Off state)
+ DSM_INTCTRL &= ~DSM_OVF_bm;
+
// turn off all LEDs
MAIN2_ENABLE_PORT &= ~(1 << MAIN2_ENABLE_PIN);
LED3_ENABLE_PORT &= ~(1 << LED3_ENABLE_PIN );
@@ -123,14 +127,18 @@ void set_hw_levels(PWM_DATATYPE main2, // brightness, 0 to DSM_TOP
MAIN2_PWM_LVL = main2_pwm = main2 >> 7;
LED3_PWM_LVL = led3_pwm = led3 >> 7;
LED4_PWM_LVL = led4_pwm = led4 >> 7;
+
+ // enable timer overflow interrupt so DSM can work
+ DSM_INTCTRL |= DSM_OVF_bm;
+
// force phase reset
PWM_CNT = PWM_CNT2 = 0;
}
// delta-sigma modulation of PWM outputs
-// happens on each Timer0 overflow (every 512 cpu clock cycles)
+// happens on each Timer overflow (every 512 cpu clock cycles)
// uses 8-bit pwm w/ 7-bit dsm (0b 0PPP PPPP PDDD DDDD)
-ISR(TIMER0_OVF_vect) {
+ISR(DSM_vect) {
// set new hardware values first,
// for best timing (reduce effect of interrupt jitter)
MAIN2_PWM_LVL = main2_pwm;
diff --git a/hwdef-emisar-d4k-3ch.h b/hwdef-emisar-d4k-3ch.h
index 581f51c..2e83fbe 100644
--- a/hwdef-emisar-d4k-3ch.h
+++ b/hwdef-emisar-d4k-3ch.h
@@ -94,6 +94,13 @@ enum channel_modes_e {
// (max is (255 << 7), because it's 8-bit PWM plus 7 bits of DSM)
#define DSM_TOP (255<<7) // 15-bit resolution leaves 1 bit for carry
+// timer interrupt for DSM
+#define DSM_vect TIMER0_OVF_vect
+#define DSM_INTCTRL TIMSK
+#define DSM_OVF_bm (1<<TOIE0)
+
+#define DELAY_FACTOR 90 // less time in delay() because more time spent in interrupts
+
// main 2 LEDs / 1st channel (2 LEDs)
uint16_t main2_dsm_lvl;
uint8_t main2_pwm, main2_dsm;
@@ -228,7 +235,8 @@ inline void hwdef_setup() {
;
// set up interrupt for delta-sigma modulation
- TIMSK |= (1<<TOIE0); // interrupt once for each timer 0 cycle
+ // (moved to hwdef.c functions so it can be enabled/disabled based on ramp level)
+ //DSM_INTCTRL |= DSM_OVF_bm; // interrupt once for each timer cycle
// set up e-switch
SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch
diff --git a/hwdef-noctigon-m44.h b/hwdef-noctigon-m44.h
index 094e555..5658c9f 100644
--- a/hwdef-noctigon-m44.h
+++ b/hwdef-noctigon-m44.h
@@ -85,6 +85,8 @@ enum channel_modes_e {
#define DSM_INTCTRL TIMSK
#define DSM_OVF_bm (1<<TOIE1)
+#define DELAY_FACTOR 90 // less time in delay() because more time spent in interrupts
+
// 1st channel (8 LEDs)
uint16_t ch1_dsm_lvl;
uint8_t ch1_pwm, ch1_dsm;
If you find this content useful please consider a small donation via bitcoin: bitcoin:1mxKyQsHHugqRxPKgwaA7wUwJEGCNthn2?amount=0.001&message=Donation Scraping git contents via cgit is very resource intensive. The continued hosting of these git repositories is entirely financed by your bitcoin contributions. For donations of a least 1 mBTC you include your IP address in the message of your bitcoin donation. This will remove this message in the future for requests from your IP, which will significantly reduce token usage. In any case, any contributions to bitcoin address 1mxKyQsHHugqRxPKgwaA7wUwJEGCNthn2 are very welcome. Thanks in advance for you contribution to a self-sustaining ecosystem.