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-rw-r--r--hwdef-Wurkkos_TS25.h116
-rw-r--r--hwdef-wurkkos-ts25.c49
-rw-r--r--hwdef-wurkkos-ts25.h179
-rw-r--r--spaghetti-monster/anduril/cfg-wurkkos-ts25.h79
4 files changed, 273 insertions, 150 deletions
diff --git a/hwdef-Wurkkos_TS25.h b/hwdef-Wurkkos_TS25.h
deleted file mode 100644
index cf34754..0000000
--- a/hwdef-Wurkkos_TS25.h
+++ /dev/null
@@ -1,116 +0,0 @@
-// Wurkkos TS25 driver layout
-// Copyright (C) 2022-2023 (FIXME)
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- * Driver pinout:
- * eSwitch: PA5
- * PWM FET: PB0 (TCA0 WO0)
- * PWM 1x7135: PB1 (TCA0 WO1)
- * Voltage: VCC
- * Aux Blue: PC1
- * Aux Red: PC2
- * Aux Green: PC3
- */
-
-#define LAYOUT_DEFINED
-
-#ifdef ATTINY
-#undef ATTINY
-#endif
-#define ATTINY 1616
-#include <avr/io.h>
-
-#define PWM_CHANNELS 2
-#define PWM_BITS 16
-#define PWM_TOP 255
-#define USE_DYN_PWM
-
-#ifndef SWITCH_PIN
-#define SWITCH_PIN PIN5_bp
-#define SWITCH_PORT VPORTA.IN
-#define SWITCH_ISC_REG PORTA.PIN2CTRL
-#define SWITCH_VECT PORTA_PORT_vect
-#define SWITCH_INTFLG VPORTA.INTFLAGS
-#endif
-
-
-// 7135 channel
-#ifndef PWM1_PIN
-#define PWM1_PIN PB1 //
-#define PWM1_LVL TCA0.SINGLE.CMP1BUF // CMP1 is the output compare register for PB1
-#endif
-
-// FET channel
-#ifndef PWM2_PIN
-#define PWM2_PIN PB0 //
-#define PWM2_LVL TCA0.SINGLE.CMP0BUF // CMP0 is the output compare register for PB0
-#endif
-
-// PWM parameters of both channels are tied together because they share a counter
-#define PWM1_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM
-// not necessary when double-buffered "BUF" registers are used
-#define PWM1_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment
-#define PWM1_PHASE_RESET_OFF // force reset while shutting off
-#define PWM1_PHASE_RESET_ON // force reset while turning on
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
-#endif
-
-
-// this driver allows for aux LEDs under the optic
-#define AUXLED_B_PIN PIN1_bp // pin 1
-#define AUXLED_R_PIN PIN2_bp // pin 2
-#define AUXLED_G_PIN PIN3_bp // pin 3
-#define AUXLED_RGB_PORT PORTC // PORTA or PORTB or PORTC
-
-
-// with so many pins, doing this all with #ifdefs gets awkward...
-// ... so just hardcode it in each hwdef file instead
-inline void hwdef_setup() {
-
- // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
-
- //VPORTA.DIR = ...;
- VPORTB.DIR = PIN0_bm | PIN1_bm; // Outputs: PWMs
- VPORTC.DIR = PIN1_bm | PIN2_bm | PIN3_bm;
-
- // enable pullups on the unused pins to reduce power
- PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // eSwitch
- PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
- PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
-
- //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
- //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
- PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
- PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
- PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
- PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
-
- PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
- //PORTC.PIN1CTRL = PORT_PULLUPEN_bm; // RGB Aux
- //PORTC.PIN2CTRL = PORT_PULLUPEN_bm; // RGB Aux
- //PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // RGB Aux
-
- // set up the PWM
- // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
- // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
- // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
- // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
- // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
- // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
- // See the manual for other pins, clocks, configs, portmux, etc
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
- PWM1_TOP = PWM_TOP;
- TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
-}
-
diff --git a/hwdef-wurkkos-ts25.c b/hwdef-wurkkos-ts25.c
new file mode 100644
index 0000000..1d5b656
--- /dev/null
+++ b/hwdef-wurkkos-ts25.c
@@ -0,0 +1,49 @@
+// Wurkkos TS25 PWM helper functions
+// Copyright (C) 2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include "chan-rgbaux.c"
+
+// single set of LEDs with 2 stacked power channels, DDFET+1 or DDFET+linear
+void set_level_main(uint8_t level) {
+ if (level == 0) {
+ CH1_PWM = 0;
+ CH2_PWM = 0;
+ PWM_CNT = 0; // reset phase
+ return;
+ }
+
+ level --; // PWM array index = level - 1
+ PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+ PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+ // pulse frequency modulation, a.k.a. dynamic PWM
+ uint16_t top = PWM_GET16(pwm_tops, level);
+
+ CH1_PWM = ch1_pwm;
+ CH2_PWM = ch2_pwm;
+ // wait to sync the counter and avoid flashes
+ // (unnecessary w/ buffered registers)
+ //while(actual_level && (PWM_CNT > (top - 32))) {}
+ PWM_TOP = top;
+ // force reset phase when turning on from zero
+ // (because otherwise the initial response is inconsistent)
+ if (! actual_level) PWM_CNT = 0;
+}
+
+bool gradual_tick_main(uint8_t gt) {
+ PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+ PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt);
+
+ GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT);
+ GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM);
+
+ if ( (pwm1 == CH1_PWM)
+ && (pwm2 == CH2_PWM)
+ ) {
+ return true; // done
+ }
+ return false; // not done yet
+}
+
diff --git a/hwdef-wurkkos-ts25.h b/hwdef-wurkkos-ts25.h
new file mode 100644
index 0000000..b9fbdfb
--- /dev/null
+++ b/hwdef-wurkkos-ts25.h
@@ -0,0 +1,179 @@
+// Wurkkos TS25 driver layout
+// Copyright (C) 2022-2023 (FIXME)
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ * Driver pinout:
+ * eSwitch: PA5
+ * PWM FET: PB0 (TCA0 WO0)
+ * PWM 1x7135: PB1 (TCA0 WO1)
+ * Voltage: VCC
+ * Aux Red: PC2
+ * Aux Green: PC3
+ * Aux Blue: PC1
+ */
+
+#define ATTINY 1616
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-wurkkos-ts25.c
+
+// allow using aux LEDs as extra channel modes
+#include "chan-rgbaux.h"
+
+#define USE_CHANNEL_MODES
+// channel modes:
+// * 0. FET+7135 stacked
+// * 1. aux red
+// * 2. aux yellow
+// * 3. aux green
+// * 4. aux cyan
+// * 5. aux blue
+// * 6. aux purple
+// * 7. aux white
+#define NUM_CHANNEL_MODES 8
+enum CHANNEL_MODES {
+ CM_MAIN = 0,
+ CM_AUXRED,
+ CM_AUXYEL,
+ CM_AUXGRN,
+ CM_AUXCYN,
+ CM_AUXBLU,
+ CM_AUXPRP,
+ CM_AUXWHT,
+};
+
+#define DEFAULT_CHANNEL_MODE CM_MAIN
+
+#define CHANNEL_MODES_ENABLED 0b00000001
+#define CHANNEL_HAS_ARGS 0b00000000
+
+#define SET_LEVEL_MODES set_level_main, \
+ set_level_auxred, \
+ set_level_auxyel, \
+ set_level_auxgrn, \
+ set_level_auxcyn, \
+ set_level_auxblu, \
+ set_level_auxprp, \
+ set_level_auxwht
+// gradual ticking for thermal regulation
+#define GRADUAL_TICK_MODES gradual_tick_main, \
+ gradual_tick_null, \
+ gradual_tick_null, \
+ gradual_tick_null, \
+ gradual_tick_null, \
+ gradual_tick_null, \
+ gradual_tick_null, \
+ gradual_tick_null
+
+
+#define PWM_CHANNELS 2 // old, remove this
+
+#define PWM_BITS 16 // dynamic 16-bit, but never goes over 255
+#define PWM_GET PWM_GET8
+#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255)
+#define PWM_DATATYPE2 uint16_t // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint8_t // 1x7135 ramp
+#define PWM2_DATATYPE uint8_t // DD FET ramp
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM
+#define PWM_TOP_INIT 255 // highest value used in top half of ramp
+// not necessary when double-buffered "BUF" registers are used
+#define PWM_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment
+
+// 1x7135 channel
+#define CH1_PIN PB1
+#define CH1_PWM TCA0.SINGLE.CMP1BUF // CMP1 is the output compare register for PB1
+
+// DD FET channel
+#define CH2_PIN PB0
+#define CH2_PWM TCA0.SINGLE.CMP0BUF // CMP0 is the output compare register for PB0
+
+// e-switch
+#define SWITCH_PIN PIN5_bp
+//#define SWITCH_PCINT PCINT0
+#define SWITCH_PORT VPORTA.IN
+#define SWITCH_ISC_REG PORTA.PIN2CTRL
+#define SWITCH_VECT PORTA_PORT_vect
+#define SWITCH_INTFLG VPORTA.INTFLAGS
+//#define PCINT_vect PCINT0_vect
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V
+#endif
+
+// this driver allows for aux LEDs under the optic
+#define AUXLED_R_PIN PIN2_bp // pin 2
+#define AUXLED_G_PIN PIN3_bp // pin 3
+#define AUXLED_B_PIN PIN1_bp // pin 1
+#define AUXLED_RGB_PORT PORTC // PORTA or PORTB or PORTC
+
+// this light has three aux LED channels: R, G, B
+#define USE_AUX_RGB_LEDS
+
+void set_level_main(uint8_t level);
+
+bool gradual_tick_main(uint8_t gt);
+
+
+inline void hwdef_setup() {
+
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB,
+ CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
+
+ //VPORTA.DIR = ...;
+ // Outputs: PWMs
+ VPORTB.DIR = PIN0_bm
+ | PIN1_bm;
+ // RGB aux LEDs
+ VPORTC.DIR = PIN1_bm
+ | PIN2_bm
+ | PIN3_bm;
+
+ // enable pullups on the unused pins to reduce power
+ PORTA.PIN0CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN1CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN5CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // eSwitch
+ PORTA.PIN6CTRL = PORT_PULLUPEN_bm;
+ PORTA.PIN7CTRL = PORT_PULLUPEN_bm;
+
+ //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // FET channel
+ //PORTB.PIN1CTRL = PORT_PULLUPEN_bm; // 7135 channel
+ PORTB.PIN2CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN3CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN4CTRL = PORT_PULLUPEN_bm;
+ PORTB.PIN5CTRL = PORT_PULLUPEN_bm;
+
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
+ //PORTC.PIN1CTRL = PORT_PULLUPEN_bm; // RGB Aux
+ //PORTC.PIN2CTRL = PORT_PULLUPEN_bm; // RGB Aux
+ //PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // RGB Aux
+
+ // set up the PWM
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm
+ | TCA_SINGLE_CMP1EN_bm
+ | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
+ TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc
+ | TCA_SINGLE_ENABLE_bm;
+
+ PWM_TOP = PWM_TOP_INIT;
+
+}
+
+
+#define LAYOUT_DEFINED
+
diff --git a/spaghetti-monster/anduril/cfg-wurkkos-ts25.h b/spaghetti-monster/anduril/cfg-wurkkos-ts25.h
index 3196a9a..446ee26 100644
--- a/spaghetti-monster/anduril/cfg-wurkkos-ts25.h
+++ b/spaghetti-monster/anduril/cfg-wurkkos-ts25.h
@@ -4,7 +4,7 @@
#pragma once
#define MODEL_NUMBER "0715"
-#include "hwdef-Wurkkos_TS25.h"
+#include "hwdef-wurkkos-ts25.h"
// ATTINY: 1616
// this light has three aux LED channels: R, G, B
@@ -19,44 +19,60 @@
#undef VOLTAGE_FUDGE_FACTOR
#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V, not 0.35V
-/*
-// copied from Emisar D4 ramp
-// ../../bin/level_calc.py 1 65 7135 1 0.8 150
-// ... mixed with this:
-// ../../bin/level_calc.py 2 150 7135 4 0.33 150 FET 1 10 1500
-#define RAMP_LENGTH 150
-#define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
-#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,4,5,7,8,9,11,12,14,15,17,19,20,22,24,25,27,29,31,33,35,37,39,41,43,45,48,50,52,55,57,59,62,64,67,70,72,75,78,81,84,87,90,93,96,99,102,105,109,112,115,119,122,126,129,133,137,141,144,148,152,156,160,165,169,173,177,182,186,191,195,200,205,209,214,219,224,229,234,239,244,250,255
-#define MAX_1x7135 65
-#define HALFSPEED_LEVEL 14
-#define QUARTERSPEED_LEVEL 5
-*/
+#define RAMP_SIZE 150
+
+#if 0 // 2022 version
// level 1 by hand, for the rest
// level_calc.py 7.01 2 149 7135 3 0.5 125 FET 1 10 1200 --pwm dyn:63:2048:255
-#define RAMP_LENGTH 150
-#define USE_DYN_PWM
#define PWM1_LEVELS 1,3,3,4,5,6,7,8,9,10,12,13,14,16,17,19,20,22,24,25,27,29,31,33,35,37,40,42,44,47,49,52,54,57,59,62,64,67,70,72,75,77,80,82,85,87,89,91,93,95,96,98,99,100,100,101,100,100,99,97,95,93,90,86,82,87,91,96,100,106,111,116,122,128,134,141,147,155,162,169,177,186,194,203,213,222,232,243,254,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,4,6,7,9,11,12,14,16,18,20,22,24,27,29,31,34,37,39,42,45,48,51,54,57,61,64,68,72,75,79,83,88,92,97,101,106,111,116,121,126,132,138,144,150,156,162,169,176,183,190,197,205,213,221,229,237,246,255
#define PWM_TOPS 2047,2047,1198,1322,1584,1676,1701,1691,1662,1622,1774,1703,1631,1692,1613,1639,1558,1564,1559,1478,1464,1444,1420,1392,1361,1329,1331,1293,1256,1246,1207,1192,1152,1133,1094,1074,1035,1013,991,954,932,897,875,842,820,790,760,731,704,678,646,622,593,566,534,510,478,452,423,393,364,338,310,280,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
#define MAX_1x7135 90
#define HALFSPEED_LEVEL 2
#define QUARTERSPEED_LEVEL 2
+#endif
-#define RAMP_SMOOTH_FLOOR 1
-#define RAMP_SMOOTH_CEIL 120
-// 10 28 46 [65] 83 101 120
-#define RAMP_DISCRETE_FLOOR 10
-#define RAMP_DISCRETE_CEIL RAMP_SMOOTH_CEIL
-#define RAMP_DISCRETE_STEPS 7
+// 7135 at 75/150
+// level_calc.py 5.7895 2 150 7135 1 0.1 130 FET 1 10 3000 --pwm dyn:74:4096:255:3
+// (with some manual tweaks)
+#define PWM1_LEVELS 1,1,2,3,3,4,5,6,7,8,9,11,12,13,15,16,18,19,21,23,26,27,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,66,68,70,71,74,76,78,80,82,85,87,90,93,96,100,103,107,112,116,122,127,133,140,147,154,163,171,182,192,203,215,228,241,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
+// non-zero part of FET channel calculated with:
+// level_calc.py 3 1 75 7135 1 200 3000
+// (FIXME? there's a visible bump when the FET kicks in, even with just 1/255)
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,2,3,4,6,7,8,10,11,13,14,16,17,19,21,22,24,26,28,30,32,34,37,39,41,44,46,48,51,54,56,59,62,65,68,71,74,77,81,84,87,91,94,98,102,106,110,114,118,122,126,130,135,139,144,148,153,158,163,168,173,178,184,189,195,200,206,212,218,224,230,236,242,248,255
+#define PWM_TOPS 4095,2701,3200,3586,2518,2778,2834,2795,2705,2587,2455,2582,2412,2247,2256,2091,2062,1907,1860,1802,1737,1605,1542,1477,1412,1347,1284,1222,1162,1105,1050,997,946,898,853,810,768,730,693,658,625,594,564,536,503,485,462,439,418,398,384,366,353,340,327,319,307,298,292,284,280,273,269,266,263,260,258,256,256,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
+
+#define MAX_1x7135 75
+#define DEFAULT_LEVEL 50
+#define MIN_THERM_STEPDOWN 60
+#define HALFSPEED_LEVEL 20
+#define QUARTERSPEED_LEVEL 5
+
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL 150
+// 20 38 56 [75] 93 111 130
+#define RAMP_DISCRETE_FLOOR 20
+#define RAMP_DISCRETE_CEIL 130
+#define RAMP_DISCRETE_STEPS 7
// at Wurkkos's request, reduce the Simple UI ceiling a little bit
-#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
-#define SIMPLE_UI_CEIL 135
-#define SIMPLE_UI_STEPS 5
+// 25 50 [75] 100 125
+#define SIMPLE_UI_FLOOR 25
+#define SIMPLE_UI_CEIL 125
+#define SIMPLE_UI_STEPS 5
// enable 2 click turbo (Anduril 1 style)
#define DEFAULT_2C_STYLE 1
+// stop panicking at ~50% power
+#define THERM_FASTER_LEVEL 120 // throttle back faster when high
+
+// show each channel while it scroll by in the menu
+#define USE_CONFIG_COLORS
+
+// blink numbers on the aux LEDs by default
+#define DEFAULT_BLINK_CHANNEL CM_AUXWHT
+
// enable SOS in the blinkies group
#define USE_SOS_MODE
#define USE_SOS_MODE_IN_BLINKY_GROUP
@@ -67,16 +83,11 @@
// allow Aux Config and Strobe Modes in Simple UI
#define USE_EXTENDED_SIMPLE_UI
-// enable factory reset on 13H without loosening tailcap
-#define USE_SOFT_FACTORY_RESET
-
-// stop panicking at ~55% power
-#define THERM_FASTER_LEVEL 130 // throttle back faster when high
-
-// don't blink during the ramp or at the ceiling
+// don't blink mid-ramp
#ifdef BLINK_AT_RAMP_MIDDLE
#undef BLINK_AT_RAMP_MIDDLE
#endif
-#ifdef BLINK_AT_RAMP_CEIL
-#undef BLINK_AT_RAMP_CEIL
-#endif
+
+// enable factory reset on 13H without loosening tailcap
+#define USE_SOFT_FACTORY_RESET
+
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-28 19:46:22 +0000