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-rw-r--r--hw/lumintop/fw3x-lume1/cfg.h81
-rw-r--r--hw/lumintop/fw3x-lume1/hwdef.c60
-rw-r--r--hw/lumintop/fw3x-lume1/hwdef.h202
3 files changed, 343 insertions, 0 deletions
diff --git a/hw/lumintop/fw3x-lume1/cfg.h b/hw/lumintop/fw3x-lume1/cfg.h
new file mode 100644
index 0000000..184ab8e
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/cfg.h
@@ -0,0 +1,81 @@
+// lume1 for FW3x config options for Anduril
+// Copyright (C) 2020-2023 LoneOceans, Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ * Constant current Buck-Boost + FET driver
+ * For more information: www.loneoceans.com/labs/
+ * Datasheets:
+ * - 1634: http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8303-8-bit-AVR-Microcontroller-tinyAVR-ATtiny1634_Datasheet.pdf
+ * - 85: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2586-AVR-8-bit-Microcontroller-ATtiny25-ATtiny45-ATtiny85_Datasheet.pdf
+ */
+
+#define MODEL_NUMBER "0314"
+#include "hwdef-fw3x-lume1.h"
+// ATTINY: 1634
+
+// set this light for 50C thermal ceiling
+#undef DEFAULT_THERM_CEIL
+#define DEFAULT_THERM_CEIL 50
+
+// this light has three aux LED channels: R, G, B
+#define USE_AUX_RGB_LEDS
+
+// it has no independent LED in the button unlike emisar d4
+//#define USE_BUTTON_LED
+
+// the aux LEDs are front-facing, so turn them off while main LEDs are on
+#ifdef USE_INDICATOR_LED_WHILE_RAMPING
+#undef USE_INDICATOR_LED_WHILE_RAMPING
+#endif
+
+// ../../bin/level_calc.py cube 1 149 7135 0 0.5 1000, with 0 appended to the end.
+// for FET PWM (PWM2), all values are 0, except for last value of 1023
+// (with max_pwm set to 1023)
+#define RAMP_SIZE 150
+//#define PWM1_LEVELS 0,0,0,0,1,1,1,1,2,2,2,3,3,4,4,5,5,6,7,7,8,9,10,11,12,13,14,15,16,17,19,20,22,23,25,26,28,30,32,34,36,38,40,42,45,47,49,52,55,58,60,63,66,70,73,76,80,83,87,91,94,98,102,107,111,115,120,124,129,134,139,144,150,155,160,166,172,178,184,190,196,203,209,216,223,230,237,244,252,259,267,275,283,291,299,308,316,325,334,343,353,362,372,382,392,402,412,423,433,444,455,466,478,489,501,513,525,538,550,563,576,589,602,616,630,644,658,672,687,701,716,731,747,762,778,794,810,827,844,861,878,895,913,930,948,967,985,1004,1023,0
+#define PWM1_LEVELS 1,1,1,1,2,2,2,2,3,3,3,4,4,5,5,6,6,7,8,8,9,10,11,12,13,14,15,16,17,18,20,21,23,24,26,27,29,31,33,35,37,39,41,43,45,48,50,53,56,58,61,64,67,70,74,77,80,84,88,91,95,99,103,108,112,116,121,125,130,135,140,145,150,156,161,167,173,178,184,191,197,203,210,217,223,230,238,245,252,260,268,275,283,292,300,308,317,326,335,344,353,363,372,382,392,402,413,423,434,445,456,467,478,490,502,514,526,538,551,563,576,589,603,616,630,644,658,672,687,702,717,732,747,763,778,794,811,827,844,861,878,895,913,931,949,967,985,1004,1023,0
+#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1023
+#define DEFAULT_LEVEL 56
+#define MAX_1x7135 149
+// TODO: test if underclocking works on lume1
+//#define HALFSPEED_LEVEL 14
+//#define QUARTERSPEED_LEVEL 5
+// don't slow down at low levels; this isn't that sort of light
+// (it needs to stay at full speed for the 10-bit PWM to work)
+#ifdef USE_DYNAMIC_UNDERCLOCKING
+#undef USE_DYNAMIC_UNDERCLOCKING
+#endif
+
+// the entire ramp is regulated except turbo; don't blink halfway up
+#ifdef BLINK_AT_RAMP_MIDDLE
+#undef BLINK_AT_RAMP_MIDDLE
+#endif
+
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL 149
+// turn on BuckBoost from level 1 to 149, but not 150
+// Level 150 is when BuckBoost is off and FET is ON 100%
+#define LED_ENABLE_PIN_LEVEL_MIN 1
+#define LED_ENABLE_PIN_LEVEL_MAX 149
+// 10 33 56 79 102 125 [149]
+#define RAMP_DISCRETE_FLOOR 10
+#define RAMP_DISCRETE_CEIL RAMP_SMOOTH_CEIL
+#define RAMP_DISCRETE_STEPS 7
+
+#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
+#define SIMPLE_UI_CEIL 120
+#define SIMPLE_UI_STEPS 5
+
+// slow down party strobe; this driver can't pulse for too short a time
+#define PARTY_STROBE_ONTIME 4
+
+// stop panicking at ~85% regulated power or ~750 lm
+#define THERM_FASTER_LEVEL 140
+
+#define THERM_CAL_OFFSET 0 // not needed due to external sensor
+
+// can't reset the normal way because power is connected before the button
+#define USE_SOFT_FACTORY_RESET
+
diff --git a/hw/lumintop/fw3x-lume1/hwdef.c b/hw/lumintop/fw3x-lume1/hwdef.c
new file mode 100644
index 0000000..2f31ed0
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/hwdef.c
@@ -0,0 +1,60 @@
+// FW3X Lume1 PWM helper functions
+// Copyright (C) 2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#include "chan-rgbaux.c"
+
+void set_level_zero();
+
+void set_level_main(uint8_t level);
+bool gradual_tick_main(uint8_t gt);
+
+
+Channel channels[] = {
+ { // channel 1 only
+ .set_level = set_level_main,
+ .gradual_tick = gradual_tick_main
+ },
+ RGB_AUX_CHANNELS
+};
+
+
+void set_level_zero() {
+ CH1_PWM = 0;
+ CH2_PWM = 0;
+ PWM_CNT = 0; // reset phase
+ CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN); // disable regulator
+}
+
+// single set of LEDs with 2 stacked power channels, regulated + DD FET
+void set_level_main(uint8_t level) {
+ CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN); // enable regulator
+
+ PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+ PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+
+ CH1_PWM = ch1_pwm;
+ CH2_PWM = ch2_pwm;
+
+ // force reset phase when turning on from zero
+ // (for faster, more consistent initial response)
+ if (! actual_level) PWM_CNT = 0;
+}
+
+bool gradual_tick_main(uint8_t gt) {
+ // 150/150 is full FET + zero regulated,
+ // 149/150 is zero FET + full regulated,
+ // so don't try to gradually adjust between
+ if ((RAMP_SIZE == actual_level) || (gt >= RAMP_SIZE-1)) {
+ set_level(gt + 1);
+ return true;
+ }
+
+ PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+ GRADUAL_ADJUST_SIMPLE(pwm1, CH1_PWM);
+
+ if (pwm1 == CH1_PWM) return true; // done
+ return false; // not done yet
+}
+
diff --git a/hw/lumintop/fw3x-lume1/hwdef.h b/hw/lumintop/fw3x-lume1/hwdef.h
new file mode 100644
index 0000000..c03248b
--- /dev/null
+++ b/hw/lumintop/fw3x-lume1/hwdef.h
@@ -0,0 +1,202 @@
+// lume1 Driver Rev B for FW3x driver layout (attiny1634)
+// Copyright (C) 2020-2023 LoneOceans, Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/* lume1 Driver Rev B for FW3x driver layout (attiny1634)
+ * www.loneoceans.com/labs/ for more information
+ *
+ * Pin / Name / Function in Lume1 Rev B
+ * 1 PA6 Regulated PWM (PWM1B)
+ * 2 PA5 R: red aux LED (PWM0B)
+ * 3 PA4 G: green aux LED
+ * 4 PA3 B: blue aux LED
+ * 5 PA2 e-switch (PCINT2)
+ * 6 PA1 Jumper 1
+ * 7 PA0 Jumper 2
+ * 8 GND GND
+ * 9 VCC VCC
+ * 10 PC5 Jumper 3
+ * 11 PC4 Jumper 4
+ * 12 PC3 RESET
+ * 13 PC2 External Thermal Sensor (ADC11)
+ * 14 PC1 SCK
+ * 15 PC0 N/C
+ * 16 PB3 FET PWM (PWM1A)
+ * 17 PB2 MISO
+ * 18 PB1 MOSI
+ * 19 PB0 ADC5 Voltage Battery Sense (2:1 divider)
+ * 20 PA7 BB_Enable
+ * ADC12 internal thermal sensor (not used for lume1)
+ *
+ * Main LED power uses one pin as a global Buck Boost Enable, and
+ * one pin to control the power level via PWM.
+ * Another pin is used for DD FET control.
+ */
+
+#define ATTINY 1634
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-fw3x-lume1.c
+
+// allow using aux LEDs as extra channel modes
+#include "chan-rgbaux.h"
+
+// channel modes:
+// * 0. main LEDs
+// * 1+. aux RGB
+#define NUM_CHANNEL_MODES (1 + NUM_RGB_AUX_CHANNEL_MODES)
+enum CHANNEL_MODES {
+ CM_MAIN = 0,
+ RGB_AUX_ENUMS
+};
+
+#define DEFAULT_CHANNEL_MODE CM_MAIN
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b0000000000000001
+
+
+#define PWM_CHANNELS 2 // old, remove this
+
+// Added for Lume1 Buck Boost Driver
+#define PWM_BITS 16 // 0 to 1023 at 3.9 kHz, not 0 to 255 at 15.6 kHz
+#define PWM_GET PWM_GET16
+#define PWM_DATATYPE uint16_t
+#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255
+#define PWM1_DATATYPE uint16_t // regulated ramp
+#define PWM2_DATATYPE uint16_t // DD FET ramp
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM_TOP ICR1 // holds the TOP value for variable-resolution PWM
+#define PWM_TOP_INIT 1023
+#define PWM_CNT TCNT1 // for dynamic PWM, reset phase
+
+// regulated channel
+#define CH1_PIN PA6 // pin 1, Buck Boost CTRL pin or 7135-eqv PWM
+#define CH1_PWM OCR1B // OCR1B is the output compare register for PA6
+#define CH1_ENABLE_PIN PA7 // pin 20, BuckBoost Enable
+#define CH1_ENABLE_PORT PORTA // control port for PA7
+
+// DD FET channel
+#define CH2_PIN PB3 // pin 16, FET PWM Pin, but only used as on (1023) or off (0)
+#define CH2_PWM OCR1A // OCR1A is the output compare register for PB3
+
+/* // For Jumpers X1 to X4, no SW support yet
+#define JUMPER1_PIN PA1
+#define JUMPER2_PIN PA0
+#define JUMPER3_PIN PC5
+#define JUMPER4_PIN PC4
+*/
+
+// e-switch
+#define SWITCH_PIN PA2 // pin 5
+#define SWITCH_PCINT PCINT2 // pin 5 pin change interrupt
+#define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0]
+#define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0]
+#define SWITCH_PORT PINA // PINA or PINB or PINC
+#define SWITCH_PUE PUEA // pullup group A
+#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0]
+
+#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
+#define VOLTAGE_PIN PB0 // Pin 19 PB0 ADC5
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC ADC5D // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC5D
+// DS tables 19-3, 19-4
+// Bit 7 6 5 4 3 2 1 0
+// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
+// MUX[3:0] = 0, 1, 0, 1 for ADC5 / PB0
+// divided by ...
+// REFS[1:0] = 0, 0 for VCC as analog reference at 2.5V
+// other bits reserved
+#define ADMUX_VOLTAGE_DIVIDER 0b00000101
+#define ADC_PRSCL 0x06 // clk/64
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+// [(Vbatt)*(R2/(R2+R1)) / 2.5V] * 1023
+// R1 = R2 = 100kR
+#ifndef ADC_44
+#define ADC_44 900
+#endif
+#ifndef ADC_22
+#define ADC_22 450
+#endif
+
+// Default ADMUX_THERM for Temperature is: 0b10001110 in tk-attiny.h
+// REFS[1:0] as 10 for analog reference at internal 1.1Vref
+// MUX[3:0] as 1110 for ADC'12' - temperature sensor internal
+
+// Modified fsm-adc.c to use different ADMUX and ADC_temperature_handler()
+// based on USE_EXTERNAL_TEMP_SENSOR
+// See line 34 and line 209
+#define USE_EXTERNAL_TEMP_SENSOR
+#define ADMUX_THERM_EXTERNAL_SENSOR 0b00001011 // VCC reference (2.5V), Channel PC2
+// Used for Lume1 Driver: MCP9700 - T_Celsius = 100*(VOUT - 0.5V)
+// ADC is 2.5V reference, 0 to 1023
+// FIXME: due to floating point, this calculation takes 916 extra bytes
+// (should use an integer equivalent instead)
+#define EXTERN_TEMP_FORMULA(m) (((m)-205)/4.09)
+
+// this driver allows for aux LEDs under the optic
+#define AUXLED_R_PIN PA5 // pin 2
+#define AUXLED_G_PIN PA4 // pin 3
+#define AUXLED_B_PIN PA3 // pin 4
+#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC
+#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC
+#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC
+
+// For lume1 driver, no SW support for Auxillary Jumpers X1 to X4 yet!
+inline void hwdef_setup() {
+ // enable output ports
+ // FET PWM Pin
+ DDRB = (1 << CH2_PIN);
+ // Main PWM, Buck Boost Enable Pin, aux R/G/B
+ DDRA = (1 << CH1_PIN)
+ | (1 << CH1_ENABLE_PIN)
+ | (1 << AUXLED_R_PIN)
+ | (1 << AUXLED_G_PIN)
+ | (1 << AUXLED_B_PIN)
+ ;
+
+ //DDRB&=~(1<<VOLTAGE_PIN); // All pins are input by default
+ /* // For Jumpers X1 to X4, no SW support yet
+ DDRA &= (1<<JUMPER1_PIN);
+ DDRA &= (1<<JUMPER2_PIN);
+ DDRC &= (1<<JUMPER3_PIN);
+ DDRC &= (1<<JUMPER4_PIN);
+ PUEA = (1 << JUMPER1_PIN);
+ PUEA = (1 << JUMPER2_PIN);
+ PUEC = (1 << JUMPER3_PIN);
+ PUEC = (1 << JUMPER4_PIN);
+ */
+
+ // configure PWM for 10 bit at 3.9kHz
+ // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
+ // pre-scale for timer: N = 1
+ // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
+ // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6)
+ // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4)
+ // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4)
+ TCCR1A = (1<<WGM11) | (1<<WGM10) // 10-bit (TOP=0x03FF) (DS table 12-5)
+ | (1<<COM1A1) | (0<<COM1A0) // PWM 1A Clear OC1A on Compare Match
+ | (1<<COM1B1) | (0<<COM1B0) // PWM 1B Clear OC1B on Compare Match
+ ;
+ TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6)
+ | (0<<WGM13) | (0<<WGM12) // PWM, Phase Correct, 10-bit
+ ;
+
+ // set PWM resolution
+ PWM_TOP = PWM_TOP_INIT;
+
+ // set up e-switch
+ SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch
+ SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt
+}
+
+
+#define LAYOUT_DEFINED
+
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