diff options
Diffstat (limited to '')
| -rw-r--r-- | hwdef-noctigon-k1.c | 65 | ||||
| -rw-r--r-- | hwdef-noctigon-k1.h (renamed from hwdef-Noctigon_K1.h) | 123 | ||||
| -rw-r--r-- | hwdef-noctigon-kr4.h | 2 |
3 files changed, 145 insertions, 45 deletions
diff --git a/hwdef-noctigon-k1.c b/hwdef-noctigon-k1.c new file mode 100644 index 0000000..5063fd5 --- /dev/null +++ b/hwdef-noctigon-k1.c @@ -0,0 +1,65 @@ +// Noctigon K1 PWM helper functions +// Copyright (C) 2019-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later + +#pragma once + +#include "chan-rgbaux.c" + +void set_level_main(uint8_t level); +bool gradual_tick_main(uint8_t gt); + + +Channel channels[] = { + { // channel 1 only + .set_level = set_level_main, + .gradual_tick = gradual_tick_main + }, + RGB_AUX_CHANNELS +}; + + +// single set of LEDs with 2 stacked power channels, linear + DD FET +void set_level_main(uint8_t level) { + if (level == 0) { + CH1_PWM = 0; + //CH2_PWM = 0; + //PWM_CNT = 0; // reset phase + CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN); // disable opamp + return; + } + + CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN); // enable opamp + + level --; // PWM array index = level - 1 + PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level); + //PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level); + // pulse frequency modulation, a.k.a. dynamic PWM + //uint16_t top = PWM_GET16(pwm_tops, level); + + CH1_PWM = ch1_pwm; + //CH2_PWM = ch2_pwm; + // wait to sync the counter and avoid flashes + //while(actual_level && (PWM_CNT > (top - 32))) {} + //PWM_TOP = top; + // force reset phase when turning on from zero + // (because otherwise the initial response is inconsistent) + //if (! actual_level) PWM_CNT = 0; +} + +bool gradual_tick_main(uint8_t gt) { + PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt); + //PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt); + + GRADUAL_ADJUST_SIMPLE (pwm1, CH1_PWM); + //GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT); + //GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM); + + if ( (pwm1 == CH1_PWM) + // && (pwm2 == CH2_PWM) + ) { + return true; // done + } + return false; // not done yet +} + diff --git a/hwdef-Noctigon_K1.h b/hwdef-noctigon-k1.h index 2e44e23..6467567 100644 --- a/hwdef-Noctigon_K1.h +++ b/hwdef-noctigon-k1.h @@ -36,27 +36,60 @@ * not to change brightness. */ -#ifdef ATTINY -#undef ATTINY -#endif #define ATTINY 1634 #include <avr/io.h> -#define PWM_CHANNELS 1 -#define PWM_BITS 10 // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz -#define PWM_TOP 1023 +#ifndef HWDEF_C_FILE +#define HWDEF_C_FILE hwdef-noctigon-k1.c +#endif + +// allow using aux LEDs as extra channel modes +#include "chan-rgbaux.h" + +// channel modes: +// * 0. main LED +// * 1+. aux RGB +#define NUM_CHANNEL_MODES (1 + NUM_RGB_AUX_CHANNEL_MODES) +enum CHANNEL_MODES { + CM_MAIN = 0, + RGB_AUX_ENUMS +}; + +#define DEFAULT_CHANNEL_MODE CM_MAIN + +// right-most bit first, modes are in fedcba9876543210 order +#define CHANNEL_MODES_ENABLED 0b0000000000000001 +// no args +//#define USE_CHANNEL_MODE_ARGS +//#define CHANNEL_MODE_ARGS 0,0,0,0,0,0,0,0 + + +#define PWM_CHANNELS 1 // old, remove this + +#define PWM_BITS 10 // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz +#define PWM_GET PWM_GET16 +#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255) +#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint16_t // linear ramp +#define PWM_TOP ICR1 // holds the TOP value for variable-resolution PWM +#define PWM_TOP_INIT 1023 // highest value used in top half of ramp +#define PWM_CNT TCNT1 // for dynamic PWM, reset phase + +// linear channel +#define CH1_PIN PB3 // pin 16, Opamp reference +#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3 +#define CH1_ENABLE_PIN PB0 // pin 19, Opamp power +#define CH1_ENABLE_PORT PORTB // control port for PB0 + +// e-switch #define SWITCH_PIN PA7 // pin 20 #define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt #define SWITCH_PCIE PCIE0 // PCIE0 is for PCINT[7:0] #define SWITCH_PCMSK PCMSK0 // PCMSK0 is for PCINT[7:0] #define SWITCH_PORT PINA // PINA or PINB or PINC - -#define PWM1_PIN PB3 // pin 16, Opamp reference -#define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3 - -#define LED_ENABLE_PIN PB0 // pin 19, Opamp power -#define LED_ENABLE_PORT PORTB // control port for PB0 +#define SWITCH_PUE PUEA // pullup group A +#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0] #define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened @@ -78,7 +111,7 @@ // Raw ADC readings at 4.4V and 2.2V // calibrate the voltage readout here // estimated / calculated values are: -// (voltage - D1) * (R2/(R2+R1) * 256 / 1.1) +// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1) // D1, R1, R2 = 0, 330, 100 #ifndef ADC_44 //#define ADC_44 981 // raw value at 4.40V @@ -97,39 +130,41 @@ #define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC #define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC -// with so many pins, doing this all with #ifdefs gets awkward... -// ... so just hardcode it in each hwdef file instead + inline void hwdef_setup() { - // enable output ports - // Opamp level and Opamp on/off - DDRB = (1 << PWM1_PIN) - | (1 << LED_ENABLE_PIN); - // aux R/G/B - DDRA = (1 << AUXLED_R_PIN) - | (1 << AUXLED_G_PIN) - | (1 << AUXLED_B_PIN) - ; - - // configure PWM - // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter - // pre-scale for timer: N = 1 - // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5) - // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) - // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) - // COM1B[1:0]: 0,0: PWM OC1B disabled (DS table 12-4) - TCCR1A = (1<<WGM11) | (1<<WGM10) // 10-bit (TOP=0x03FF) (DS table 12-5) - | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) - | (0<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) - ; - TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) - | (0<<WGM13) | (0<<WGM12) // phase-correct PWM (DS table 12-5) - ; - - // set up e-switch - //PORTA = (1 << SWITCH_PIN); // TODO: configure PORTA / PORTB / PORTC? - PUEA = (1 << SWITCH_PIN); // pull-up for e-switch - SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt + // enable output ports + // Opamp level and Opamp on/off + DDRB = (1 << CH1_PIN) + | (1 << CH1_ENABLE_PIN); + // aux R/G/B + DDRA = (1 << AUXLED_R_PIN) + | (1 << AUXLED_G_PIN) + | (1 << AUXLED_B_PIN) + ; + + // configure PWM + // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter + // pre-scale for timer: N = 1 + // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5) + // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) + // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) + // COM1B[1:0]: 0,0: PWM OC1B disabled (DS table 12-4) + TCCR1A = (1<<WGM11) | (1<<WGM10) // 10-bit (TOP=0x03FF) (DS table 12-5) + | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) + | (0<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) + ; + TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) + | (0<<WGM13) | (0<<WGM12) // phase-correct PWM (DS table 12-5) + ; + + // set PWM resolution + //PWM_TOP = PWM_TOP_INIT; + + // set up e-switch + SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch + SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt } + #define LAYOUT_DEFINED diff --git a/hwdef-noctigon-kr4.h b/hwdef-noctigon-kr4.h index 202a302..02e88af 100644 --- a/hwdef-noctigon-kr4.h +++ b/hwdef-noctigon-kr4.h @@ -72,7 +72,7 @@ enum CHANNEL_MODES { #define PWM2_DATATYPE uint8_t // DD FET ramp // PWM parameters of both channels are tied together because they share a counter -#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM +#define PWM_TOP ICR1 // holds the TOP value for variable-resolution PWM #define PWM_TOP_INIT 255 // highest value used in top half of ramp #define PWM_CNT TCNT1 // for dynamic PWM, reset phase |