aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
Diffstat (limited to '')
-rw-r--r--hwdef-BLF_Q8-T1616.h14
-rw-r--r--hwdef-Sofirn_SP10-Pro.h (renamed from hwdef-Sofirn_SP10S.h)56
-rw-r--r--hwdef-gchart-fet1-t1616.h17
3 files changed, 47 insertions, 40 deletions
diff --git a/hwdef-BLF_Q8-T1616.h b/hwdef-BLF_Q8-T1616.h
index 2a0e6ff..d6ad760 100644
--- a/hwdef-BLF_Q8-T1616.h
+++ b/hwdef-BLF_Q8-T1616.h
@@ -61,8 +61,8 @@ Driver pinout:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = ...;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm; // Outputs: Aux LED and PWMs
@@ -91,8 +91,14 @@ inline void hwdef_setup() {
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
diff --git a/hwdef-Sofirn_SP10S.h b/hwdef-Sofirn_SP10-Pro.h
index 0ee3332..4691d04 100644
--- a/hwdef-Sofirn_SP10S.h
+++ b/hwdef-Sofirn_SP10-Pro.h
@@ -1,28 +1,14 @@
-#ifndef HWDEF_SOFIRN_SP10S_H
-#define HWDEF_SOFIRN_SP10S_H
+#ifndef HWDEF_SOFIRN_SP10_H
+#define HWDEF_SOFIRN_SP10_H
-// TODO: rename to sofirn-sp10s-gchart?
-
-/* gChart's PIC12 to ATTINY1616 v1 adapter for the SP10S
-https://oshpark.com/shared_projects/b4IZEGSy
-
-PIC12 Pinout:
-1 - VDD
-2 - No Connect
-3 - Low Channel FET (series 4.7K Ohms)
-4 - Switch
-5 - High Channel FET (main PWM)
-6 - Voltage Divider (300K:100K Ohms)
-7 - Boost chip enable
-8 - GND
+/* Sofirn SP10 Pro pinout
ATTINY1616 Mapping:
-2 - PA5 : (no connect)
-3 - PB5 : TCA0 - WO2 Alternate MUX
-4 - PB3 : (switch)
-5 - PB0 : TCA0 - WO0
-6 - PB4 : ADC0 - AIN9
-7 - PA1 : (boost enable)
+PB5 : PWM small channel (TCA0 - WO2 Alternate MUX)
+PB3 : eSwitch
+PB0 : PWM big channel (TCA0 - WO0)
+PB4 : Voltage divider (ADC0 - AIN9)
+PA1 : Boost Enable
*/
@@ -44,6 +30,9 @@ ATTINY1616 Mapping:
#endif
#define PWM_CHANNELS 2
+#define PWM_BITS 16 // data type needs 16 bits, not 8
+#define PWM_TOP 255 // highest value used in top half of ramp
+#define USE_DYN_PWM // dynamic frequency and speed
// Small channel
#ifndef PWM1_PIN
@@ -57,12 +46,15 @@ ATTINY1616 Mapping:
#define PWM2_LVL TCA0.SINGLE.CMP0 // PB0 is TCA Compare 0
#endif
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM1_TOP TCA0.SINGLE.PER // holds the TOP value for for variable-resolution PWM
+
#define LED_ENABLE_PIN PIN1_bp
#define LED_ENABLE_PORT PORTA_OUT
#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened
#define DUAL_VOLTAGE_FLOOR 20 // for AA/14500 boost drivers, don't indicate low voltage if below this level
-#define DUAL_VOLTAGE_LOW_LOW 07 // the lower voltage range's danger zone 0.7 volts
+#define DUAL_VOLTAGE_LOW_LOW 8 // the lower voltage range's danger zone 0.8 volts (NiMH)
#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read
// Raw ADC readings at 4.4V and 2.2V
@@ -83,8 +75,8 @@ ATTINY1616 Mapping:
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
VPORTA.DIR = PIN1_bm; // Boost enable pin
VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output
@@ -107,16 +99,22 @@ inline void hwdef_setup() {
//PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider
//PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel
- //PORTC.PIN0CTRL = PORT_PULLUPEN_bm; connected to the ADC via airwire
+ PORTC.PIN0CTRL = PORT_PULLUPEN_bm;
PORTC.PIN1CTRL = PORT_PULLUPEN_bm;
PORTC.PIN2CTRL = PORT_PULLUPEN_bm;
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
- TCA0.SINGLE.PER = 255;
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
+ PWM1_TOP = PWM_TOP;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
diff --git a/hwdef-gchart-fet1-t1616.h b/hwdef-gchart-fet1-t1616.h
index 365ecd7..2435b99 100644
--- a/hwdef-gchart-fet1-t1616.h
+++ b/hwdef-gchart-fet1-t1616.h
@@ -60,8 +60,8 @@ Read voltage from VCC pin, has diode with ~0.4v drop
// ... so just hardcode it in each hwdef file instead
inline void hwdef_setup() {
- // set up the system clock to run at 5 MHz instead of the default 3.33 MHz
- _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm );
+ // set up the system clock to run at 10 MHz instead of the default 3.33 MHz
+ _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
//VPORTA.DIR = 0b00000010;
VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm;
@@ -90,11 +90,14 @@ inline void hwdef_setup() {
PORTC.PIN3CTRL = PORT_PULLUPEN_bm;
// set up the PWM
- // TODO: add references to MCU documentation
- // TODO: measure 5 MHz fast PWM vs 10 MHz phase-correct, to see if it
- // still has issues at 0/255 and 255/255 like older models did
- // (and maybe switch to phase-correct@10MHz)
- TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc;
+ // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
+ // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm
+ // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm
+ // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm
+ // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc
+ // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc
+ // See the manual for other pins, clocks, configs, portmux, etc
+ TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc;
TCA0.SINGLE.PER = 255;
TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm;
}
If you find this content useful please consider a small donation via bitcoin: bitcoin:1mxKyQsHHugqRxPKgwaA7wUwJEGCNthn2?amount=0.001&message=Donation Scraping git contents via cgit is very resource intensive. The continued hosting of these git repositories is entirely financed by your bitcoin contributions. For donations of a least 1 mBTC you include your IP address in the message of your bitcoin donation. This will remove this message in the future for requests from your IP, which will significantly reduce token usage. In any case, any contributions to bitcoin address 1mxKyQsHHugqRxPKgwaA7wUwJEGCNthn2 are very welcome. Thanks in advance for you contribution to a self-sustaining ecosystem.