diff options
Diffstat (limited to '')
| -rw-r--r-- | hwdef-sofirn-sp10-pro.h (renamed from hwdef-Sofirn_SP10-Pro.h) | 135 |
1 files changed, 74 insertions, 61 deletions
diff --git a/hwdef-Sofirn_SP10-Pro.h b/hwdef-sofirn-sp10-pro.h index d7c2081..5cef6a7 100644 --- a/hwdef-Sofirn_SP10-Pro.h +++ b/hwdef-sofirn-sp10-pro.h @@ -1,67 +1,75 @@ -#ifndef HWDEF_SOFIRN_SP10_H -#define HWDEF_SOFIRN_SP10_H +// Sofirn SP10 Pro pinout +// Copyright (C) 2022-2023 (original author TBD), Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +/* + * ATTINY1616 Mapping: + * PB5 : PWM small channel (TCA0 - WO2 Alternate MUX) + * PB3 : eSwitch + * PB0 : PWM big channel (TCA0 - WO0) + * PB4 : Voltage divider (ADC0 - AIN9) + * PA1 : Boost Enable + */ -/* Sofirn SP10 Pro pinout +#define ATTINY 1616 +#include <avr/io.h> -ATTINY1616 Mapping: -PB5 : PWM small channel (TCA0 - WO2 Alternate MUX) -PB3 : eSwitch -PB0 : PWM big channel (TCA0 - WO0) -PB4 : Voltage divider (ADC0 - AIN9) -PA1 : Boost Enable +#define HWDEF_C_FILE hwdef-sofirn-sp10-pro.c -*/ +// channel modes: +// * 0. low+high PWM stacked +#define NUM_CHANNEL_MODES 1 +enum CHANNEL_MODES { + CM_MAIN = 0, +}; +#define DEFAULT_CHANNEL_MODE CM_MAIN -#define LAYOUT_DEFINED +// right-most bit first, modes are in fedcba9876543210 order +#define CHANNEL_MODES_ENABLED 0b00000001 -#ifdef ATTINY -#undef ATTINY -#endif -#define ATTINY 1616 -#include <avr/io.h> -#ifndef SWITCH_PIN -#define SWITCH_PIN 3 -#define SWITCH_PORT VPORTB.IN -#define SWITCH_ISC_REG PORTB.PIN3CTRL -#define SWITCH_VECT PORTB_PORT_vect -#define SWITCH_INTFLG VPORTB.INTFLAGS -#endif +#define PWM_CHANNELS 2 // old, remove this -#define PWM_CHANNELS 2 -#define PWM_BITS 16 // data type needs 16 bits, not 8 -#define PWM_TOP 255 // highest value used in top half of ramp -#define USE_DYN_PWM // dynamic frequency and speed +#define PWM_BITS 16 // data type needs 16 bits, not 8 +#define PWM_GET PWM_GET16 +#define PWM_DATATYPE uint16_t // is used for PWM_TOPS (which goes way over 255) +#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint16_t // low PWM ramp +#define PWM2_DATATYPE uint16_t // high PWM ramp + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM +#define PWM_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment +#define PWM_TOP_INIT 255 // highest value used in top half of ramp (unused?) // Small channel -#ifndef PWM1_PIN -#define PWM1_PIN PB5 -#define PWM1_LVL TCA0.SINGLE.CMP2BUF // PB5 is Alternate MUX for TCA Compare 2 -#endif +#define CH1_PIN PB5 +#define CH1_PWM TCA0.SINGLE.CMP2BUF // PB5 is Alternate MUX for TCA Compare 2 // Big channel -#ifndef PWM2_PIN -#define PWM2_PIN PB0 -#define PWM2_LVL TCA0.SINGLE.CMP0BUF // PB0 is TCA Compare 0 -#endif - -// PWM parameters of both channels are tied together because they share a counter -#define PWM1_TOP TCA0.SINGLE.PERBUF // holds the TOP value for for variable-resolution PWM -// not necessary when double-buffered "BUF" registers are used -#define PWM1_CNT TCA0.SINGLE.CNT // for resetting phase after each TOP adjustment -#define PWM1_PHASE_RESET_OFF // force reset while shutting off -#define PWM1_PHASE_RESET_ON // force reset while turning on -//#define PWM1_PHASE_SYNC // manual sync while changing level - -#define LED_ENABLE_PIN PIN1_bp -#define LED_ENABLE_PORT PORTA_OUT -//#define LED_OFF_DELAY 4 // only needed when PWM1_PHASE_RESET_OFF not used - -#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened -#define DUAL_VOLTAGE_FLOOR 21 // for AA/14500 boost drivers, don't indicate low voltage if below this level +#define CH2_PIN PB0 +#define CH2_PWM TCA0.SINGLE.CMP0BUF // PB0 is TCA Compare 0 + +// boost enable +#define BST_ENABLE_PIN PIN1_bp +#define BST_ENABLE_PORT PORTA_OUT + +// e-switch +#define SWITCH_PIN 3 +#define SWITCH_PORT VPORTB.IN +#define SWITCH_ISC_REG PORTB.PIN3CTRL +#define SWITCH_VECT PORTB_PORT_vect +#define SWITCH_INTFLG VPORTB.INTFLAGS +#define SWITCH_PCINT PCINT0 +#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0] + +// Voltage divider battLVL +#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is regulated +#define DUAL_VOLTAGE_FLOOR 21 // for AA/14500 boost drivers, don't indicate low voltage if below this level #define DUAL_VOLTAGE_LOW_LOW 7 // the lower voltage range's danger zone 0.7 volts (NiMH) -#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read +#define ADMUX_VOLTAGE_DIVIDER ADC_MUXPOS_AIN9_gc // which ADC channel to read // Raw ADC readings at 4.4V and 2.2V // calibrate the voltage readout here @@ -77,15 +85,15 @@ PA1 : Boost Enable -// with so many pins, doing this all with #ifdefs gets awkward... -// ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { // set up the system clock to run at 10 MHz instead of the default 3.33 MHz - _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); + _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, + CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); VPORTA.DIR = PIN1_bm; // Boost enable pin - VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output + VPORTB.DIR = PIN0_bm // big PWM channel + | PIN5_bm; // small PWM channel //VPORTC.DIR = ...; // enable pullups on the input pins to reduce power @@ -101,7 +109,8 @@ inline void hwdef_setup() { //PORTB.PIN0CTRL = PORT_PULLUPEN_bm; // Big PWM channel PORTB.PIN1CTRL = PORT_PULLUPEN_bm; PORTB.PIN2CTRL = PORT_PULLUPEN_bm; - PORTB.PIN3CTRL = PORT_PULLUPEN_bm | PORT_ISC_BOTHEDGES_gc; // Switch + PORTB.PIN3CTRL = PORT_PULLUPEN_bm + | PORT_ISC_BOTHEDGES_gc; // e-switch //PORTB.PIN4CTRL = PORT_PULLUPEN_bm; // Voltage divider //PORTB.PIN5CTRL = PORT_PULLUPEN_bm; // Small PWM channel @@ -119,9 +128,12 @@ inline void hwdef_setup() { // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc // See the manual for other pins, clocks, configs, portmux, etc PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2 - TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc; - PWM1_TOP = PWM_TOP; - TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm; + TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm + | TCA_SINGLE_CMP2EN_bm + | TCA_SINGLE_WGMODE_DSBOTTOM_gc; + PWM_TOP = PWM_TOP_INIT; + TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc + | TCA_SINGLE_ENABLE_bm; } @@ -131,7 +143,7 @@ inline void hwdef_setup() { // command: avr-objdump -d -S -j .fuse anduril.elf FUSES = { .WDTCFG = FUSE_WDTCFG_DEFAULT, // Watchdog Configuration - .BODCFG = FUSE_ACTIVE0_bm, // BOD Configuration + .BODCFG = FUSE_ACTIVE0, // BOD Configuration .OSCCFG = FUSE_OSCCFG_DEFAULT, // Oscillator Configuration .TCD0CFG = FUSE_TCD0CFG_DEFAULT, // TCD0 Configuration .SYSCFG0 = FUSE_SYSCFG0_DEFAULT, // System Configuration 0 @@ -141,4 +153,5 @@ FUSES = { }; -#endif +#define LAYOUT_DEFINED + |