From 0df827391ced9bb0b7114248c78b696de4676b25 Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Sat, 28 Sep 2019 23:14:16 -0600
Subject: remapped D1S V2 pins to match new driver (and changed a bit about how
 ADC / DIDR definitions work, since this now uses DIDR1 instead of DIDR0)

---
 hwdef-BLF_GT.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'hwdef-BLF_GT.h')

diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h
index 01dbdbd..dd8d80a 100644
--- a/hwdef-BLF_GT.h
+++ b/hwdef-BLF_GT.h
@@ -34,7 +34,9 @@
 #ifndef VOLTAGE_PIN
 #define VOLTAGE_PIN PB2     // pin 7, voltage ADC
 #define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define VOLTAGE_ADC_DIDR ADC1D  // Digital input disable bit corresponding with PB2
+#define VOLTAGE_ADC ADC1D  // Digital input disable bit corresponding with PB2
+// inherited from tk-attiny.h
+//#define VOLTAGE_ADC_DIDR DIDR0  // DIDR for ADC1
 // 1.1V reference, left-adjust, ADC1/PB2
 //#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL)
 // 1.1V reference, no left-adjust, ADC1/PB2
-- 
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