From 583854e37efde7f461e073e735a1736b02d28c70 Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Mon, 17 Apr 2023 00:08:32 -0600
Subject: switched the rest of FSM + Anduril to use SPDX license headers
 instead of full GPL headers (or all too often, nothing at all)

There are a few "FIXME" entries where I'm not sure about the correct copyright.

---
 hwdef-BLF_LT1.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'hwdef-BLF_LT1.h')

diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h
index 4e81c42..e7c4791 100644
--- a/hwdef-BLF_LT1.h
+++ b/hwdef-BLF_LT1.h
@@ -1,7 +1,9 @@
-#ifndef HWDEF_BLF_LT1_H
-#define HWDEF_BLF_LT1_H
+// BLF LT1 driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
 
-/* BLF LT1 driver layout
+/*
  *           ----
  *   Reset -|1  8|- VCC
  * eswitch -|2  7|- (unused)
@@ -54,5 +56,3 @@ uint16_t PWM1_LVL;
 
 #define LAYOUT_DEFINED
 
-
-#endif
-- 
cgit v1.2.3


From 3a654aa5150a8943a787ecbfc65c2f9ff2bff75f Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Wed, 25 Oct 2023 10:26:56 -0600
Subject: rewrote blf-lantern (blf-lt1) code to use multi-channel and PWM+DSM,
 which required ... a few pretty significant changes: - no dynamic
 underclocking (it isn't compatible with DSM yet) - no tint ramping brightness
 correction (removed to save space) - removed ramp blinks (to save space, and
 because they're annoying) - removed momentary mode (to save space) - removed
 SOS mode (to save space) - removed (to save space) some other relatively
 recent features which   weren't present in the original production firmware
 ... but some other things improved: + added smooth steps + extended Simple UI
 + added stepped tint ramping + added 13H factory reset, to save wear on
 threads + lower lows + smoother ramp + much higher tint ramp resolution in
 low modes

I'm not entirely happy with this yet, so it probably needs additional work
later in order to adjust the weird ramp shape (these 7135 chips have a weird
response curve), add dynamic underclocking, cut down the ROM size if possible,
re-add tint ramping brightness correction, etc.  Multi-channel stuff in
particular added a lot to the size.

This is a pretty big change from the previous working build, so some users
may want to stick with the last pre-multi-channel version.  Non-trivial
sacrifices were made to bring in more recent features.

---
 hwdef-BLF_LT1.h | 58 ---------------------------------------------------------
 1 file changed, 58 deletions(-)
 delete mode 100644 hwdef-BLF_LT1.h

(limited to 'hwdef-BLF_LT1.h')

diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h
deleted file mode 100644
index e7c4791..0000000
--- a/hwdef-BLF_LT1.h
+++ /dev/null
@@ -1,58 +0,0 @@
-// BLF LT1 driver layout
-// Copyright (C) 2018-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- *           ----
- *   Reset -|1  8|- VCC
- * eswitch -|2  7|- (unused)
- * aux LED -|3  6|- PWM (5000K)
- *     GND -|4  5|- PWM (3000K)
- *           ----
- */
-
-#define ATTINY 85
-#include <avr/io.h>
-
-#define PWM_CHANNELS 1  // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs)
-#define PWM_BITS 9      // 0 to 255 at 15.6 kHz, but goes to 510 for "200%" turbo
-#define PWM_TOP 255
-
-// dynamic PWM with tint ramping (not supported on attiny85)
-//#define USE_DYN_PWM     // dynamic frequency and speed
-//#define PWM1_CNT TCNT0  // for dynamic PWM, reset phase
-//#define PWM1_PHASE_RESET_OFF  // force reset while shutting off
-//#define PWM1_PHASE_RESET_ON   // force reset while turning on
-//#define PWM1_PHASE_SYNC       // manual sync while changing level
-
-// usually PWM1_LVL would be a hardware register, but we need to abstract
-// it out to a soft brightness value, in order to handle tint ramping
-// (this allows smooth thermal regulation to work, and makes things
-//  otherwise simpler and easier)
-uint16_t PWM1_LVL;
-
-#define PWM1_PIN PB0        // pin 5, warm tint PWM
-#define TINT1_LVL OCR0A     // OCR0A is the output compare register for PB0
-
-#define PWM2_PIN PB1        // pin 6, cold tint PWM
-#define TINT2_LVL OCR0B     // OCR0B is the output compare register for PB1
-
-
-#define AUXLED_PIN   PB4    // pin 3
-
-#define SWITCH_PIN   PB3    // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-
-#define ADC_PRSCL   0x07    // clk/128
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 7  // add 0.35V
-#endif
-
-#define FAST 0xA3           // fast PWM both channels
-#define PHASE 0xA1          // phase-correct PWM both channels
-
-#define LAYOUT_DEFINED
-
-- 
cgit v1.2.3