From 583854e37efde7f461e073e735a1736b02d28c70 Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Mon, 17 Apr 2023 00:08:32 -0600
Subject: switched the rest of FSM + Anduril to use SPDX license headers
 instead of full GPL headers (or all too often, nothing at all)

There are a few "FIXME" entries where I'm not sure about the correct copyright.

---
 hwdef-FW3A.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

(limited to 'hwdef-FW3A.h')

diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
index e8875d7..f2b5c8d 100644
--- a/hwdef-FW3A.h
+++ b/hwdef-FW3A.h
@@ -1,7 +1,9 @@
-#ifndef HWDEF_FW3A_H
-#define HWDEF_FW3A_H
+// BLF/TLF FW3A driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
 
-/* BLF/TLF FW3A driver layout
+/*
  *           ----
  *   Reset -|1  8|- VCC
  * eswitch -|2  7|- optic nerve
@@ -47,4 +49,3 @@
 
 #define LAYOUT_DEFINED
 
-#endif
-- 
cgit v1.2.3


From 55b5ad0665bb362dc266fd1ed79aa62bb17cd94e Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Tue, 10 Oct 2023 22:32:00 -0600
Subject: converted FW3A to new API (my FW3A dev host is dead though, so the DD
 FET channel  isn't 100% confirmed to work ... will have to solder together  a
 new dev host at some point)

---
 hwdef-FW3A.h | 51 ---------------------------------------------------
 1 file changed, 51 deletions(-)
 delete mode 100644 hwdef-FW3A.h

(limited to 'hwdef-FW3A.h')

diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
deleted file mode 100644
index f2b5c8d..0000000
--- a/hwdef-FW3A.h
+++ /dev/null
@@ -1,51 +0,0 @@
-// BLF/TLF FW3A driver layout
-// Copyright (C) 2018-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- *           ----
- *   Reset -|1  8|- VCC
- * eswitch -|2  7|- optic nerve
- *     FET -|3  6|- 7x7135
- *     GND -|4  5|- 1x7135
- *           ----
- */
-
-#define PWM_CHANNELS 3
-
-#ifndef SWITCH_PIN
-#define SWITCH_PIN   PB3    // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-#endif
-
-#ifndef PWM1_PIN
-#define PWM1_PIN PB0        // pin 5, 1x7135 PWM
-#define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
-#endif
-#ifndef PWM2_PIN
-#define PWM2_PIN PB1        // pin 6, 7x7135 PWM
-#define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
-#endif
-#ifndef PWM3_PIN
-#define PWM3_PIN PB4        // pin 3, FET PWM
-#define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB4
-#endif
-
-#ifndef VISION_PIN
-#define VISION_PIN PB2      // pin 7, optic nerve
-//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
-//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
-#endif
-#define ADC_PRSCL   0x07    // clk/128
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
-#endif
-
-#define FAST 0xA3           // fast PWM both channels
-#define PHASE 0xA1          // phase-correct PWM both channels
-
-#define LAYOUT_DEFINED
-
-- 
cgit v1.2.3