From 490630291c3fb10fc63801645116a73b4c7a5e73 Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Fri, 6 Mar 2020 03:20:26 -0700
Subject: KR4: added FET channel, measured output, calibrated ramp

---
 hwdef-Noctigon_KR4.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'hwdef-Noctigon_KR4.h')

diff --git a/hwdef-Noctigon_KR4.h b/hwdef-Noctigon_KR4.h
index c1bc171..98a0a5f 100644
--- a/hwdef-Noctigon_KR4.h
+++ b/hwdef-Noctigon_KR4.h
@@ -40,7 +40,7 @@
 #define ATTINY 1634
 #include <avr/io.h>
 
-#define PWM_CHANNELS 1
+#define PWM_CHANNELS 2
 #define PWM_BITS 10  // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz
 #define PWM_TOP 1023
 
@@ -127,10 +127,10 @@ inline void hwdef_setup() {
   // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
   // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
   // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
-  // COM1B[1:0]:    0,0: PWM OC1B disabled (DS table 12-4)
+  // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
   TCCR1A  = (1<<WGM11)  | (1<<WGM10)   // 10-bit (TOP=0x03FF) (DS table 12-5)
           | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
-          | (0<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
+          | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
           ;
   TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
           | (0<<WGM13)  | (0<<WGM12)  // phase-correct PWM (DS table 12-5)
-- 
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