From 51aae811654a3b73fa10ab449e22a11c858aa2d1 Mon Sep 17 00:00:00 2001
From: Selene ToyKeeper
Date: Fri, 13 Mar 2020 18:04:43 -0600
Subject: went back to slower clk/128 ADC timing

---
 hwdef-TK_Saber.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hwdef-TK_Saber.h')

diff --git a/hwdef-TK_Saber.h b/hwdef-TK_Saber.h
index 3f49d30..9458398 100644
--- a/hwdef-TK_Saber.h
+++ b/hwdef-TK_Saber.h
@@ -23,7 +23,7 @@
 #define SWITCH_PIN   PB2    // pin 7
 #define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt
 
-#define ADC_PRSCL   0x06    // clk/64 (no need to be super fast)
+#define ADC_PRSCL   0x07    // clk/128
 
 // average drop across diode on this hardware
 #define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
-- 
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