From 3a654aa5150a8943a787ecbfc65c2f9ff2bff75f Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Wed, 25 Oct 2023 10:26:56 -0600 Subject: rewrote blf-lantern (blf-lt1) code to use multi-channel and PWM+DSM, which required ... a few pretty significant changes: - no dynamic underclocking (it isn't compatible with DSM yet) - no tint ramping brightness correction (removed to save space) - removed ramp blinks (to save space, and because they're annoying) - removed momentary mode (to save space) - removed SOS mode (to save space) - removed (to save space) some other relatively recent features which weren't present in the original production firmware ... but some other things improved: + added smooth steps + extended Simple UI + added stepped tint ramping + added 13H factory reset, to save wear on threads + lower lows + smoother ramp + much higher tint ramp resolution in low modes I'm not entirely happy with this yet, so it probably needs additional work later in order to adjust the weird ramp shape (these 7135 chips have a weird response curve), add dynamic underclocking, cut down the ROM size if possible, re-add tint ramping brightness correction, etc. Multi-channel stuff in particular added a lot to the size. This is a pretty big change from the previous working build, so some users may want to stick with the last pre-multi-channel version. Non-trivial sacrifices were made to bring in more recent features. --- hwdef-blf-lt1.h | 106 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 hwdef-blf-lt1.h (limited to 'hwdef-blf-lt1.h') diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h new file mode 100644 index 0000000..571fa44 --- /dev/null +++ b/hwdef-blf-lt1.h @@ -0,0 +1,106 @@ +// BLF LT1 driver layout +// Copyright (C) 2018-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +/* + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- (unused) + * aux LED -|3 6|- PWM (5000K) + * GND -|4 5|- PWM (3000K) + * ---- + */ + +#define ATTINY 85 +#include + +#define HWDEF_C_FILE hwdef-blf-lt1.c + +// channel modes: +// * 0. channel 1 only +// * 1. channel 2 only +// * 2. both channels, tied together, max "200%" power +// * 3. both channels, manual blend, max "100%" power +// * 4. both channels, auto blend, reversible +#define NUM_CHANNEL_MODES 5 +enum channel_modes_e { + CM_CH1 = 0, + CM_CH2, + CM_BOTH, + CM_BLEND, + CM_AUTO, +}; + + +// right-most bit first, modes are in fedcba9876543210 order +#define CHANNEL_MODES_ENABLED 0b00011000 +#define USE_CHANNEL_MODE_ARGS +// _, _, _, 128=middle CCT, 0=warm-to-cool +#define CHANNEL_MODE_ARGS 0,0,0,128,0 + +// can use some of the common handlers +#define USE_CALC_2CH_BLEND + + +#define PWM_CHANNELS 1 // old, remove this + +#define PWM_BITS 16 // 8-bit hardware PWM + 16-bit DSM + +#define PWM_GET PWM_GET16 +#define PWM_DATATYPE uint16_t +#define PWM_DATATYPE2 uint32_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint16_t // 15-bit PWM+DSM ramp + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP_INIT 255 +#define DSM_TOP (255<<7) // 15-bit resolution leaves 1 bit for carry + +// warm LEDs +uint16_t ch1_dsm_lvl; +uint8_t ch1_pwm, ch1_dsm; +#define CH1_PIN PB1 // pin 6, warm tint PWM +#define CH1_PWM OCR0B // OCR0B is the output compare register for PB1 + +// cold LEDs +uint16_t ch2_dsm_lvl; +uint8_t ch2_pwm, ch2_dsm; +#define CH2_PIN PB0 // pin 5, cold tint PWM +#define CH2_PWM OCR0A // OCR0A is the output compare register for PB0 + +#define AUXLED_PIN PB4 // pin 3 + +// e-switch +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define ADC_PRSCL 0x07 // clk/128 + +// average drop across diode on this hardware +#ifndef VOLTAGE_FUDGE_FACTOR +#define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V +#endif + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + + +inline void hwdef_setup() { + // configure PWM channels + DDRB = (1 << CH1_PIN) + | (1 << CH2_PIN); + + TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...) + TCCR0A = PHASE; + + // enable timer 0 overflow interrupt for DSM purposes + TIMSK |= (1 << TOIE0); + + // configure e-switch + PORTB = (1 << SWITCH_PIN); // e-switch is the only input + PCMSK = (1 << SWITCH_PIN); // pin change interrupt uses this pin +} + + +#define LAYOUT_DEFINED + -- cgit v1.2.3 From 5e86193dce022967cbe41288d30cb4b21500f5e6 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Thu, 26 Oct 2023 06:58:23 -0600 Subject: improved blf-lt1 ramp and fixed issue with missed button presses (it seems t85 doesn't like having timer overflow interrupts enabled in standby?) --- hwdef-blf-lt1.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hwdef-blf-lt1.h') diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h index 571fa44..bac21cf 100644 --- a/hwdef-blf-lt1.h +++ b/hwdef-blf-lt1.h @@ -94,7 +94,7 @@ inline void hwdef_setup() { TCCR0A = PHASE; // enable timer 0 overflow interrupt for DSM purposes - TIMSK |= (1 << TOIE0); + //TIMSK |= (1 << TOIE0); // moved to hwdef.c functions instead // configure e-switch PORTB = (1 << SWITCH_PIN); // e-switch is the only input -- cgit v1.2.3 From 3be63ea383d1a0a9251eb7de974ee2012535b1b1 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Thu, 26 Oct 2023 08:47:28 -0600 Subject: minor comment cleanup --- hwdef-blf-lt1.h | 1 + 1 file changed, 1 insertion(+) (limited to 'hwdef-blf-lt1.h') diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h index bac21cf..8fce09f 100644 --- a/hwdef-blf-lt1.h +++ b/hwdef-blf-lt1.h @@ -68,6 +68,7 @@ uint8_t ch2_pwm, ch2_dsm; #define CH2_PIN PB0 // pin 5, cold tint PWM #define CH2_PWM OCR0A // OCR0A is the output compare register for PB0 +// lighted button #define AUXLED_PIN PB4 // pin 3 // e-switch -- cgit v1.2.3 From 4aec487ea7d03e9554ebbe8f50e72235bf6f2e6e Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sun, 29 Oct 2023 13:19:38 -0600 Subject: applied new delay factor to other DSM builds, and some new DSM_* defines --- hwdef-blf-lt1.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'hwdef-blf-lt1.h') diff --git a/hwdef-blf-lt1.h b/hwdef-blf-lt1.h index 8fce09f..b113fd4 100644 --- a/hwdef-blf-lt1.h +++ b/hwdef-blf-lt1.h @@ -56,6 +56,13 @@ enum channel_modes_e { #define PWM_TOP_INIT 255 #define DSM_TOP (255<<7) // 15-bit resolution leaves 1 bit for carry +// timer interrupt for DSM +#define DSM_vect TIMER0_OVF_vect +#define DSM_INTCTRL TIMSK +#define DSM_OVF_bm (1< 1, 2 => 8, 3 => 64...) TCCR0A = PHASE; - // enable timer 0 overflow interrupt for DSM purposes - //TIMSK |= (1 << TOIE0); // moved to hwdef.c functions instead + // enable timer overflow interrupt for DSM purposes + //DSM_INTCTRL |= DSM_OVF_bm; // moved to hwdef.c functions instead // configure e-switch PORTB = (1 << SWITCH_PIN); // e-switch is the only input -- cgit v1.2.3