From e96562e36df96ca755d527e479e597ae4e4e09e1 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Fri, 18 Aug 2017 18:12:17 -0600 Subject: Some early ideas for Round Table. Nothing close to compile-able yet. --- tk-attiny.h | 82 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 72ed2f0..ebd997f 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -4,7 +4,7 @@ * Attiny portability header. * This helps abstract away the differences between various attiny MCUs. * - * Copyright (C) 2015 Selene ToyKeeper + * Copyright (C) 2017 Selene ToyKeeper * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -31,12 +31,25 @@ #define EEPSIZE 64 #define V_REF REFS0 #define BOGOMIPS 950 + #define ADMUX_VCC 0b00001100 #elif (ATTINY == 25) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL #define EEPSIZE 128 #define V_REF REFS1 #define BOGOMIPS (F_CPU/4000) + #define ADMUX_VCC 0b00001100 + #define ADMUX_THERM 0b10001111 +#elif (ATTINY == 85) + // TODO: Use 6.4 MHz instead of 8 MHz? + #define F_CPU 8000000UL + #define EEPSIZE 512 + #define V_REF REFS1 + #define BOGOMIPS (F_CPU/4000) + // (1 << V_REF) | (0 << ADLAR) | (VCC_CHANNEL) + #define ADMUX_VCC 0b00001100 + // (1 << V_REF) | (0 << ADLAR) | (THERM_CHANNEL) + #define ADMUX_THERM 0b10001111 #else Hey, you need to define ATTINY. #endif @@ -145,6 +158,73 @@ #endif // NANJG_LAYOUT + +#ifdef RT_EMISAR_D4_LAYOUT +/* + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- + * AUX LED -|3 6|- PWM (FET) + * GND -|4 5|- PWM (1x7135) + * ---- + */ + +#define AUXLED_PIN PB4 // pin 3 + +#define SWITCH_PIN PB3 // pin 2, OTC +#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) +#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 + +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 + +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif + + +#ifdef RT_TKSABER_LAYOUT +/* + * ---- + * Reset -|1 8|- VCC + * PWM 4 (A) -|2 7|- e-switch + * PWM 3 (B) -|3 6|- PWM 2 (G) + * GND -|4 5|- PWM 1 (R) + * ---- + */ + +#define PWM1_PIN PB0 // pin 5 +#define PWM1_LVL OCR0A +#define PWM2_PIN PB1 // pin 6 +#define PWM2_LVL OCR0B +#define PWM3_PIN PB4 // pin 3 +#define PWM3_LVL OCR1B +#define PWM4_PIN PB3 // pin 2 +#define PWM4_LVL OCR1A // FIXME: does this work? + +#define SWITCH_PIN PB2 // pin 7 + +#define ADC_PRSCL 0x07 // clk/128 (no need to be super fast) +// FIXME: What is the DIDR for pin 8? +//#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif // TKSABER_LAYOUT + + #ifndef PWM_LVL Hey, you need to define an I/O pin layout. #endif -- cgit v1.2.3 From 086aaabd39d3c6736ace56f2badac06b75567651 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Fri, 18 Aug 2017 23:31:11 -0600 Subject: First RoundTable example actually works (simple momentary 1-mode UI). Changed how tk-attiny.h detects whether a layout was defined. Changed how tk-attiny.h detects number of PWM channels for new-style layouts. Added no-underscore versions of delay functions. Lots of RoundTable refactoring and blank-filling. --- tk-attiny.h | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index ebd997f..22b73f9 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -55,8 +55,11 @@ #endif +#include + /******************** I/O pin and register layout ************************/ #ifdef FET_7135_LAYOUT +#define LAYOUT_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -92,6 +95,7 @@ #endif // FET_7135_LAYOUT #ifdef TRIPLEDOWN_LAYOUT +#define LAYOUT_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -128,6 +132,7 @@ #endif // TRIPLEDOWN_LAYOUT #ifdef FERRERO_ROCHER_LAYOUT +#define LAYOUT_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -142,6 +147,7 @@ #endif // FERRERO_ROCHER_LAYOUT #ifdef NANJG_LAYOUT +#define LAYOUT_DEFINED #define STAR2_PIN PB0 #define STAR3_PIN PB4 #define STAR4_PIN PB3 @@ -160,6 +166,7 @@ #ifdef RT_EMISAR_D4_LAYOUT +#define LAYOUT_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -169,9 +176,12 @@ * ---- */ +#define PWM_CHANNELS 2 + #define AUXLED_PIN PB4 // pin 3 -#define SWITCH_PIN PB3 // pin 2, OTC +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt #define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) #define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 @@ -195,6 +205,7 @@ #ifdef RT_TKSABER_LAYOUT +#define LAYOUT_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -204,6 +215,7 @@ * ---- */ +#define PWM_CHANNELS 4 #define PWM1_PIN PB0 // pin 5 #define PWM1_LVL OCR0A #define PWM2_PIN PB1 // pin 6 @@ -214,6 +226,7 @@ #define PWM4_LVL OCR1A // FIXME: does this work? #define SWITCH_PIN PB2 // pin 7 +#define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt #define ADC_PRSCL 0x07 // clk/128 (no need to be super fast) // FIXME: What is the DIDR for pin 8? @@ -225,7 +238,7 @@ #endif // TKSABER_LAYOUT -#ifndef PWM_LVL +#ifndef LAYOUT_DEFINED Hey, you need to define an I/O pin layout. #endif -- cgit v1.2.3 From 8d2f442317fd3678213a14307f95d2f5b54c5623 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sat, 19 Aug 2017 12:17:58 -0600 Subject: Renamed from RoundTable to SpaghettiMonster (FSM). --- tk-attiny.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 22b73f9..e852109 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -165,7 +165,7 @@ #endif // NANJG_LAYOUT -#ifdef RT_EMISAR_D4_LAYOUT +#ifdef FSM_EMISAR_D4_LAYOUT #define LAYOUT_DEFINED /* * ---- @@ -204,7 +204,7 @@ #endif -#ifdef RT_TKSABER_LAYOUT +#ifdef FSM_TKSABER_LAYOUT #define LAYOUT_DEFINED /* * ---- -- cgit v1.2.3 From 65167c016935885552035bf983f4a5b739048f61 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sat, 19 Aug 2017 14:56:39 -0600 Subject: Added unfinished UI similar to Olight Baton series. Fixed 2nd PWM channel init. May have fixed 3rd and 4th too. Added handling for complete normal clicks, but it's kind of flaky so far. Added handling for sustained button holds. Added missing 'arg' to state change functions. --- tk-attiny.h | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index e852109..9779eb0 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -178,17 +178,15 @@ #define PWM_CHANNELS 2 -#define AUXLED_PIN PB4 // pin 3 +#define AUXLED_PIN PB4 // pin 3 -#define SWITCH_PIN PB3 // pin 2 -#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt -#define CAP_CHANNEL 0x03 // MUX 03 corresponds with PB3 (Star 4) -#define CAP_DIDR ADC3D // Digital input disable bit corresponding with PB3 +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt -#define PWM2_PIN PB1 // pin 6, FET PWM -#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 -#define PWM1_PIN PB0 // pin 5, 1x7135 PWM -#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 #define VOLTAGE_PIN PB2 // pin 7, voltage ADC #define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 -- cgit v1.2.3 From fa851a676c73e53a48114cec7fe800a9dbd2fcd9 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sat, 26 Aug 2017 13:53:33 -0600 Subject: Replaced bare config errors with the preprocessor's intended method of throwing config errors. --- tk-attiny.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 9779eb0..2cfe4fd 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -51,7 +51,7 @@ // (1 << V_REF) | (0 << ADLAR) | (THERM_CHANNEL) #define ADMUX_THERM 0b10001111 #else - Hey, you need to define ATTINY. + #error Hey, you need to define ATTINY. #endif @@ -237,7 +237,7 @@ #ifndef LAYOUT_DEFINED - Hey, you need to define an I/O pin layout. +#error Hey, you need to define an I/O pin layout. #endif #endif // TK_ATTINY_H -- cgit v1.2.3 From 15d5b2cbe807029c7493691a1877a1898d100455 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Wed, 30 Aug 2017 23:07:55 -0600 Subject: Replaced FSM_*_LAYOUT with FSM_*_DRIVER because I think it makes more sense. Made momentary.c compile again. Updated fsm-main to use whichever delay function is available. --- tk-attiny.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 2cfe4fd..7939ccc 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -59,7 +59,7 @@ /******************** I/O pin and register layout ************************/ #ifdef FET_7135_LAYOUT -#define LAYOUT_DEFINED +#define DRIVER_TYPE_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -95,7 +95,7 @@ #endif // FET_7135_LAYOUT #ifdef TRIPLEDOWN_LAYOUT -#define LAYOUT_DEFINED +#define DRIVER_TYPE_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -132,7 +132,7 @@ #endif // TRIPLEDOWN_LAYOUT #ifdef FERRERO_ROCHER_LAYOUT -#define LAYOUT_DEFINED +#define DRIVER_TYPE_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -147,7 +147,7 @@ #endif // FERRERO_ROCHER_LAYOUT #ifdef NANJG_LAYOUT -#define LAYOUT_DEFINED +#define DRIVER_TYPE_DEFINED #define STAR2_PIN PB0 #define STAR3_PIN PB4 #define STAR4_PIN PB3 @@ -165,8 +165,8 @@ #endif // NANJG_LAYOUT -#ifdef FSM_EMISAR_D4_LAYOUT -#define LAYOUT_DEFINED +#ifdef FSM_EMISAR_D4_DRIVER +#define DRIVER_TYPE_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -199,11 +199,11 @@ #define FAST 0xA3 // fast PWM both channels #define PHASE 0xA1 // phase-correct PWM both channels -#endif +#endif // ifdef FSM_EMISAR_D4_DRIVER -#ifdef FSM_TKSABER_LAYOUT -#define LAYOUT_DEFINED +#ifdef FSM_TKSABER_DRIVER +#define DRIVER_TYPE_DEFINED /* * ---- * Reset -|1 8|- VCC @@ -233,10 +233,10 @@ #define FAST 0xA3 // fast PWM both channels #define PHASE 0xA1 // phase-correct PWM both channels -#endif // TKSABER_LAYOUT +#endif // TKSABER_DRIVER -#ifndef LAYOUT_DEFINED +#ifndef DRIVER_TYPE_DEFINED #error Hey, you need to define an I/O pin layout. #endif -- cgit v1.2.3 From a419850e536f00549120255a627137faffded47a Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sun, 3 Sep 2017 14:58:22 -0600 Subject: Got the 4th PWM channel to work, ish. (channel 4 is inverted though) Moved go_to_suspend thing into main() instead of making each UI handle that during loop(). Made default_state() optional. Fixed bug where battcheck and other number readouts could interfere with the state which interrupted them. (they would sometimes turn the LED off after the new state had already started) Updated darkhorse's moon levels to match new ramp on D4 hardware. --- tk-attiny.h | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 7939ccc..887a151 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -188,6 +188,7 @@ #define PWM2_PIN PB1 // pin 6, FET PWM #define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +// (FIXME: remove? not used?) #define VOLTAGE_PIN PB2 // pin 7, voltage ADC #define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 #define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 @@ -208,7 +209,7 @@ * ---- * Reset -|1 8|- VCC * PWM 4 (A) -|2 7|- e-switch - * PWM 3 (B) -|3 6|- PWM 2 (G) + * PWM 3 (G) -|3 6|- PWM 2 (B) * GND -|4 5|- PWM 1 (R) * ---- */ @@ -221,17 +222,18 @@ #define PWM3_PIN PB4 // pin 3 #define PWM3_LVL OCR1B #define PWM4_PIN PB3 // pin 2 -#define PWM4_LVL OCR1A // FIXME: does this work? +#define PWM4_LVL OCR1A -#define SWITCH_PIN PB2 // pin 7 +#define SWITCH_PIN PB2 // pin 7 #define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt -#define ADC_PRSCL 0x07 // clk/128 (no need to be super fast) -// FIXME: What is the DIDR for pin 8? -//#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 (no need to be super fast) -#define FAST 0xA3 // fast PWM both channels -#define PHASE 0xA1 // phase-correct PWM both channels +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels #endif // TKSABER_DRIVER -- cgit v1.2.3 From 91fcc0b8ce25161692a7ef79cbc06d8c735a0318 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Fri, 22 Sep 2017 07:20:54 -0600 Subject: Added FW3A driver support to FSM and Anduril. Made lightning storm mode look a bit more like real lightning. Minor refactoring on how single-option config modes save state. --- tk-attiny.h | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index 887a151..e58c4bb 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -203,6 +203,43 @@ #endif // ifdef FSM_EMISAR_D4_DRIVER +#ifdef FSM_FW3A_DRIVER +#define DRIVER_TYPE_DEFINED +/* + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- optic nerve + * FET -|3 6|- 7x7135 + * GND -|4 5|- 1x7135 + * ---- + */ + +#define PWM_CHANNELS 3 + +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#define PWM3_PIN PB4 // pin 3 +#define PWM3_LVL OCR1B + +#define VISION_PIN PB2 // pin 7, optic nerve +#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif // ifdef FSM_FW3A_DRIVER + + #ifdef FSM_TKSABER_DRIVER #define DRIVER_TYPE_DEFINED /* -- cgit v1.2.3 From d0219fc267b3741e9ff84643a5f381d3c229f18a Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Sat, 21 Oct 2017 06:44:40 -0600 Subject: Made DELAY_ZERO_TIME a per-MCU option; hopefully will sync to PWM better that way. Added BLF Q8 driver type, but it's basically identical to the D4 except in name. (can be used to auto-detect whether to use indicator LED, and what the diode drop constant should be) --- tk-attiny.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index e58c4bb..ea784f5 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -32,6 +32,7 @@ #define V_REF REFS0 #define BOGOMIPS 950 #define ADMUX_VCC 0b00001100 + #define DELAY_ZERO_TIME 252 #elif (ATTINY == 25) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL @@ -40,6 +41,7 @@ #define BOGOMIPS (F_CPU/4000) #define ADMUX_VCC 0b00001100 #define ADMUX_THERM 0b10001111 + #define DELAY_ZERO_TIME 1020 #elif (ATTINY == 85) // TODO: Use 6.4 MHz instead of 8 MHz? #define F_CPU 8000000UL @@ -50,6 +52,7 @@ #define ADMUX_VCC 0b00001100 // (1 << V_REF) | (0 << ADLAR) | (THERM_CHANNEL) #define ADMUX_THERM 0b10001111 + #define DELAY_ZERO_TIME 1020 #else #error Hey, you need to define ATTINY. #endif @@ -165,6 +168,12 @@ #endif // NANJG_LAYOUT +// Q8 driver is the same as a D4, basically +#ifdef FSM_BLF_Q8_DRIVER +#define FSM_EMISAR_D4_DRIVER +#endif + + #ifdef FSM_EMISAR_D4_DRIVER #define DRIVER_TYPE_DEFINED /* -- cgit v1.2.3 From 23474cbf278cd70f0b3a2e19da1e0b51139ae6f9 Mon Sep 17 00:00:00 2001 From: Selene ToyKeeper Date: Tue, 1 May 2018 19:51:57 -0600 Subject: Created BLF GT driver definition. --- tk-attiny.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'tk-attiny.h') diff --git a/tk-attiny.h b/tk-attiny.h index ea784f5..d81468b 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -249,6 +249,51 @@ #endif // ifdef FSM_FW3A_DRIVER +#ifdef FSM_BLF_GT_DRIVER +#define DRIVER_TYPE_DEFINED +/* + * ---- + * Reset -|1 8|- VCC (unused) + * eswitch -|2 7|- Voltage divider + * AUX LED -|3 6|- Current control (buck level) + * GND -|4 5|- PWM (buck output on/off) + * ---- + */ + +#define PWM_CHANNELS 2 + +#define AUXLED_PIN PB4 // pin 3 + +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#define PWM2_PIN PB1 // pin 6, FET PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 + +#define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC +#define VOLTAGE_PIN PB2 // pin 7, voltage ADC +#define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2 +// 1.1V reference, left-adjust, ADC1/PB2 +//#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL) +// 1.1V reference, no left-adjust, ADC1/PB2 +#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL) +#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#define ADC_PRSCL 0x06 // clk/64 + +// Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line) +#define ADC_44 184 +#define ADC_22 92 + +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#endif // ifdef FSM_BLF_GT_DRIVER + + #ifdef FSM_TKSABER_DRIVER #define DRIVER_TYPE_DEFINED /* -- cgit v1.2.3