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authorUri Shaked2019-11-19 17:12:55 +0200
committerUri Shaked2019-11-19 17:12:55 +0200
commite01ae3e0a046b60d1b1d89bd448ca930b9790d29 (patch)
treece291ef7eb75fb3b430bb912326f5bfbd643845a
parentdoc: add some comments (diff)
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feat: implement STX
-rw-r--r--src/instruction.spec.ts26
-rw-r--r--src/instruction.ts7
2 files changed, 29 insertions, 4 deletions
diff --git a/src/instruction.spec.ts b/src/instruction.spec.ts
index 9ea4c0f..8c81a06 100644
--- a/src/instruction.spec.ts
+++ b/src/instruction.spec.ts
@@ -46,10 +46,21 @@ describe('avrInstruction', () => {
expect(cpu.cycles).toEqual(2);
});
+ it('should execute `ST X, r1` instruction', () => {
+ loadProgram('1c92');
+ cpu.data[1] = 0x5a; // r1 <- 0x5a
+ cpu.data[26] = 0x9a; // X <- 0x9a
+ avrInstruction(cpu);
+ expect(cpu.pc).toEqual(1);
+ expect(cpu.cycles).toEqual(1);
+ expect(cpu.data[0x9a]).toEqual(0x5a);
+ expect(cpu.data[26]).toEqual(0x9a); // verify that X was unchanged
+ });
+
it('should execute `ST X+, r1` instruction', () => {
loadProgram('1d92');
- cpu.data[1] = 0x5a; // put the value 5a in r1
- cpu.data[26] = 0x9a; // X <- 0x19
+ cpu.data[1] = 0x5a; // r1 <- 5a
+ cpu.data[26] = 0x9a; // X <- 0x9a
avrInstruction(cpu);
expect(cpu.pc).toEqual(1);
expect(cpu.cycles).toEqual(1);
@@ -57,6 +68,17 @@ describe('avrInstruction', () => {
expect(cpu.data[26]).toEqual(0x9b); // verify that X was incremented
});
+ it('should execute `ST X-, r17` instruction', () => {
+ loadProgram('1e93');
+ cpu.data[17] = 0x88; // r17 <- 0x88
+ cpu.data[26] = 0x99; // X <- 0x99
+ avrInstruction(cpu);
+ expect(cpu.pc).toEqual(1);
+ expect(cpu.cycles).toEqual(2);
+ expect(cpu.data[0x98]).toEqual(0x88);
+ expect(cpu.data[26]).toEqual(0x98); // verify that X was unchanged
+ });
+
it('should execute `CPI r26, 0x9` instruction', () => {
loadProgram('a930');
cpu.data[26] = 0x8;
diff --git a/src/instruction.ts b/src/instruction.ts
index f7789d2..63c4caa 100644
--- a/src/instruction.ts
+++ b/src/instruction.ts
@@ -425,7 +425,7 @@ export function avrInstruction(cpu: ICPU) {
/* STX */
if ((opcode & 0xfe0f) === 0x920c) {
- /* not implemented */
+ cpu.writeData(cpu.dataView.getUint16(26, true), cpu.data[(opcode & 0x1f0) >> 4]);
}
/* STX */
@@ -436,7 +436,10 @@ export function avrInstruction(cpu: ICPU) {
/* STX */
if ((opcode & 0xfe0f) === 0x920e) {
- /* not implemented */
+ const i = cpu.data[(opcode & 0x1f0) >> 4];
+ cpu.dataView.setUint16(26, cpu.dataView.getUint16(26, true) - 1, true);
+ cpu.writeData(cpu.dataView.getUint16(26, true), i);
+ cpu.cycles++;
}
/* STY */
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