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authorlironh2020-03-21 09:52:53 +0200
committerlironh2020-03-22 21:08:30 +0200
commit8934a7566a038a74464d3d8df9d04fd875e5b1d7 (patch)
treee131c263938081e6c89f39f141f3f20f6da8f851 /src/index.ts
parentMerge pull request #19 from gfeun/main-execute-loop-optimization (diff)
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refactor: added peripherals and cpu feature folders
Diffstat (limited to '')
-rw-r--r--src/index.ts14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/index.ts b/src/index.ts
index ef0b514..58afde3 100644
--- a/src/index.ts
+++ b/src/index.ts
@@ -4,10 +4,10 @@
* Copyright (C) 2019, 2020, Uri Shaked
*/
-export { CPU, ICPU, CPUMemoryHook, CPUMemoryHooks } from './cpu';
-export { avrInstruction } from './instruction';
-export { avrInterrupt } from './interrupt';
-export { AVRTimer, timer0Config, timer1Config, timer2Config } from './timer';
+export { CPU, ICPU, CPUMemoryHook, CPUMemoryHooks } from './cpu/cpu';
+export { avrInstruction } from './cpu/instruction';
+export { avrInterrupt } from './cpu/interrupt';
+export { AVRTimer, timer0Config, timer1Config, timer2Config } from './peripherals/timer';
export {
AVRIOPort,
GPIOListener,
@@ -24,6 +24,6 @@ export {
portKConfig,
portLConfig,
PinState
-} from './gpio';
-export { AVRUSART, usart0Config } from './usart';
-export * from './twi';
+} from './peripherals/gpio';
+export { AVRUSART, usart0Config } from './peripherals/usart';
+export * from './peripherals/twi';