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| author | Uri Shaked | 2021-10-24 15:33:09 +0300 |
|---|---|---|
| committer | Uri Shaked | 2021-10-24 15:33:09 +0300 |
| commit | a7132e3766deb4ee49f94513b702525b42af2c1f (patch) | |
| tree | b37a178f75476109090d98949defccaf1833d672 /src/peripherals/eeprom.ts | |
| parent | 0.18.3 (diff) | |
| download | avr8js-a7132e3766deb4ee49f94513b702525b42af2c1f.tar.gz avr8js-a7132e3766deb4ee49f94513b702525b42af2c1f.tar.bz2 avr8js-a7132e3766deb4ee49f94513b702525b42af2c1f.zip | |
fix(eeprom): EEPROM interrupt not firing #110
fix #110
Diffstat (limited to '')
| -rw-r--r-- | src/peripherals/eeprom.ts | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/peripherals/eeprom.ts b/src/peripherals/eeprom.ts index 8056847..045ffe8 100644 --- a/src/peripherals/eeprom.ts +++ b/src/peripherals/eeprom.ts @@ -58,6 +58,7 @@ const EEMPE = 1 << 2; const EERIE = 1 << 3; const EEPM0 = 1 << 4; const EEPM1 = 1 << 5; +const EECR_WRITE_MASK = EEPE | EEMPE | EERIE | EEPM0 | EEPM1; export class AVREEPROM { /** @@ -91,6 +92,9 @@ export class AVREEPROM { const addr = (this.cpu.data[EEARH] << 8) | this.cpu.data[EEARL]; + this.cpu.data[EECR] = (this.cpu.data[EECR] & ~EECR_WRITE_MASK) | (eecr & EECR_WRITE_MASK); + this.cpu.updateInterruptEnable(this.EER, eecr); + if (eecr & EERE) { this.cpu.clearInterrupt(this.EER); } @@ -116,6 +120,7 @@ export class AVREEPROM { if (eecr & EEPE) { // If EEMPE is zero, setting EEPE will have no effect. if (this.cpu.cycles >= this.writeEnabledCycles) { + this.cpu.data[EECR] &= ~EEPE; return true; } // Check for write-in-progress @@ -147,10 +152,9 @@ export class AVREEPROM { // When EEPE has been set, the CPU is halted for two cycles before the // next instruction is executed. this.cpu.cycles += 2; - return true; } - return false; + return true; }; } } |
