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authorUri Shaked2021-09-07 00:42:42 +0300
committerUri Shaked2021-09-07 00:42:42 +0300
commit5bc85ec07ac00013de4681cb5d268e4567709be0 (patch)
tree7f0dace897c49e1352f974e844c40a8130537b95 /src/peripherals/gpio.ts
parent0.17.0 (diff)
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fix(gpio): CBI/SBI handling in writes to PIN register #103
fix #103
Diffstat (limited to '')
-rw-r--r--src/peripherals/gpio.ts4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/peripherals/gpio.ts b/src/peripherals/gpio.ts
index 6d1dae8..07667d9 100644
--- a/src/peripherals/gpio.ts
+++ b/src/peripherals/gpio.ts
@@ -229,11 +229,11 @@ export class AVRIOPort {
this.updatePinRegister(ddrMask);
return true;
};
- cpu.writeHooks[portConfig.PIN] = (value: u8) => {
+ cpu.writeHooks[portConfig.PIN] = (value: u8, oldValue, addr, mask) => {
// Writing to 1 PIN toggles PORT bits
const oldPortValue = cpu.data[portConfig.PORT];
const ddrMask = cpu.data[portConfig.DDR];
- const portValue = oldPortValue ^ value;
+ const portValue = oldPortValue ^ (value & mask);
cpu.data[portConfig.PORT] = portValue;
this.writeGpio(portValue, ddrMask);
this.updatePinRegister(ddrMask);