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authorUri Shaked2020-12-20 16:28:06 +0200
committerUri Shaked2020-12-20 16:30:23 +0200
commitf32994d68ce708cbc4e24f5de655c8cf0ffb52ef (patch)
tree15d7abb5ea7806434b2ce662c38ee5e2167f5ff3 /src/peripherals/timer.spec.ts
parent0.14.3 (diff)
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fix(timer): TOV flag does not update correctly #75
fix #75
Diffstat (limited to 'src/peripherals/timer.spec.ts')
-rw-r--r--src/peripherals/timer.spec.ts38
1 files changed, 35 insertions, 3 deletions
diff --git a/src/peripherals/timer.spec.ts b/src/peripherals/timer.spec.ts
index 11c0264..583e759 100644
--- a/src/peripherals/timer.spec.ts
+++ b/src/peripherals/timer.spec.ts
@@ -239,7 +239,7 @@ describe('timer', () => {
expect(cpu.cycles).toEqual(2);
});
- it('should clear the timer in CTC mode if it equals to OCRA', () => {
+ it('should reset the counter in CTC mode if it equals to OCRA', () => {
const cpu = new CPU(new Uint16Array(0x1000));
new AVRTimer(cpu, timer0Config);
cpu.writeData(TCNT0, 0x10);
@@ -248,12 +248,44 @@ describe('timer', () => {
cpu.writeData(TCCR0B, CS00); // Set prescaler to 1
cpu.cycles = 1;
cpu.tick();
- cpu.cycles = 2;
+ cpu.cycles = 3;
cpu.tick();
const tcnt = cpu.readData(TCNT0);
expect(tcnt).toEqual(0);
expect(cpu.pc).toEqual(0);
- expect(cpu.cycles).toEqual(2);
+ expect(cpu.cycles).toEqual(3);
+ });
+
+ it('should not set the TOV bit when TOP < MAX in CTC mode (issue #75)', () => {
+ const cpu = new CPU(new Uint16Array(0x1000));
+ new AVRTimer(cpu, timer0Config);
+ cpu.writeData(TCNT0, 0x1e);
+ cpu.writeData(OCR0A, 0x1f);
+ cpu.writeData(TCCR0A, WGM01); // WGM: CTC
+ cpu.writeData(TCCR0B, CS00); // Set prescaler to 1
+ cpu.cycles = 1;
+ cpu.tick();
+ cpu.cycles = 2;
+ cpu.tick();
+ const tcnt = cpu.readData(TCNT0);
+ expect(tcnt).toEqual(0x1f);
+ expect(cpu.data[TIFR0]).toEqual(OCF0A); // TOV0 clear
+ });
+
+ it('should set the TOV bit when TOP == MAX in CTC mode (issue #75)', () => {
+ const cpu = new CPU(new Uint16Array(0x1000));
+ new AVRTimer(cpu, timer0Config);
+ cpu.writeData(TCNT0, 0xfe);
+ cpu.writeData(OCR0A, 0xff);
+ cpu.writeData(TCCR0A, WGM01); // WGM: CTC
+ cpu.writeData(TCCR0B, CS00); // Set prescaler to 1
+ cpu.cycles = 1;
+ cpu.tick();
+ cpu.cycles = 2;
+ cpu.tick();
+ const tcnt = cpu.readData(TCNT0);
+ expect(tcnt).toEqual(0xff);
+ expect(cpu.data[TIFR0]).toEqual(OCF0A | TOV0);
});
it('should set OCF0B flag when timer equals OCRB', () => {