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authorUri Shaked2020-12-21 17:07:04 +0200
committerUri Shaked2020-12-21 17:07:04 +0200
commit14dfcef719d06eec1dec34219607f84406f7e02b (patch)
tree8cf345771ee5e2fe0bb30ef3b494451333e7d756 /src/peripherals/timer.ts
parentdocs(README): add "Which chips can be simulated" (diff)
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fix(timer): Output Compare issue #74
output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
Diffstat (limited to '')
-rw-r--r--src/peripherals/timer.ts9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/peripherals/timer.ts b/src/peripherals/timer.ts
index f10a49b..71c1982 100644
--- a/src/peripherals/timer.ts
+++ b/src/peripherals/timer.ts
@@ -299,7 +299,9 @@ export class AVRTimer {
this.countingUp = true;
this.tcntUpdated = true;
this.cpu.updateClockEvent(this.count, 0);
- this.timerUpdated();
+ if (this.divider) {
+ this.timerUpdated();
+ }
};
this.cpu.writeHooks[config.OCRA] = (value: u8) => {
this.nextOcrA = (this.highByteTemp << 8) | value;
@@ -498,14 +500,13 @@ export class AVRTimer {
private timerUpdated() {
const value = this.tcnt;
-
- if (this.ocrA && value === this.ocrA) {
+ if (value === this.ocrA) {
this.cpu.setInterruptFlag(this.OCFA);
if (this.compA) {
this.updateCompPin(this.compA, 'A');
}
}
- if (this.ocrB && value === this.ocrB) {
+ if (value === this.ocrB) {
this.cpu.setInterruptFlag(this.OCFB);
if (this.compB) {
this.updateCompPin(this.compB, 'B');