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authorUri Shaked2025-02-11 10:31:57 +0200
committerUri Shaked2025-02-11 10:31:57 +0200
commit9ce22e49cf1110d0a8c1943877dc32e6568354cc (patch)
tree6ad61569ee9a311b5ca8f330948b2136b2c04ed5 /src/peripherals
parentchore: replace ts-node with tsx (diff)
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chore(deps): upgrade prettier
reformat all code with the new prettier version
Diffstat (limited to '')
-rw-r--r--src/peripherals/adc.ts5
-rw-r--r--src/peripherals/clock.ts2
-rw-r--r--src/peripherals/eeprom.ts2
-rw-r--r--src/peripherals/gpio.ts7
-rw-r--r--src/peripherals/spi.ts6
-rw-r--r--src/peripherals/timer.ts5
-rw-r--r--src/peripherals/twi.ts6
-rw-r--r--src/peripherals/usart.ts6
-rw-r--r--src/peripherals/watchdog.ts6
9 files changed, 35 insertions, 10 deletions
diff --git a/src/peripherals/adc.ts b/src/peripherals/adc.ts
index 1e0e2d1..16ccdba 100644
--- a/src/peripherals/adc.ts
+++ b/src/peripherals/adc.ts
@@ -163,7 +163,10 @@ export class AVRADC {
enableMask: ADIE,
};
- constructor(private cpu: CPU, private config: ADCConfig) {
+ constructor(
+ private cpu: CPU,
+ private config: ADCConfig,
+ ) {
cpu.writeHooks[config.ADCSRA] = (value, oldValue) => {
if (value & ADEN && !(oldValue && ADEN)) {
this.conversionCycles = 25;
diff --git a/src/peripherals/clock.ts b/src/peripherals/clock.ts
index d443843..bf49ac9 100644
--- a/src/peripherals/clock.ts
+++ b/src/peripherals/clock.ts
@@ -35,7 +35,7 @@ export class AVRClock {
constructor(
private cpu: CPU,
private baseFreqHz: u32,
- private config: AVRClockConfig = clockConfig
+ private config: AVRClockConfig = clockConfig,
) {
this.cpu.writeHooks[this.config.CLKPR] = (clkpr) => {
if ((!this.clockEnabledCycles || this.clockEnabledCycles < cpu.cycles) && clkpr === CLKPCE) {
diff --git a/src/peripherals/eeprom.ts b/src/peripherals/eeprom.ts
index 045ffe8..98c2cc6 100644
--- a/src/peripherals/eeprom.ts
+++ b/src/peripherals/eeprom.ts
@@ -85,7 +85,7 @@ export class AVREEPROM {
constructor(
private cpu: CPU,
private backend: EEPROMBackend,
- private config: AVREEPROMConfig = eepromConfig
+ private config: AVREEPROMConfig = eepromConfig,
) {
this.cpu.writeHooks[this.config.EECR] = (eecr) => {
const { EEARH, EEARL, EECR, EEDR } = this.config;
diff --git a/src/peripherals/gpio.ts b/src/peripherals/gpio.ts
index 0da9d50..92435b9 100644
--- a/src/peripherals/gpio.ts
+++ b/src/peripherals/gpio.ts
@@ -219,7 +219,10 @@ export class AVRIOPort {
private lastPin: u8 = 0;
openCollector: u8 = 0;
- constructor(private cpu: CPU, readonly portConfig: Readonly<AVRPortConfig>) {
+ constructor(
+ private cpu: CPU,
+ readonly portConfig: Readonly<AVRPortConfig>,
+ ) {
cpu.gpioPorts.add(this);
cpu.gpioByPort[portConfig.PORT] = this;
@@ -259,7 +262,7 @@ export class AVRIOPort {
enableRegister: externalConfig.EIMSK,
enableMask: 1 << externalConfig.index,
}
- : null
+ : null,
);
const EICR = new Set(externalInterrupts.map((item) => item?.EICR));
for (const EICRx of EICR) {
diff --git a/src/peripherals/spi.ts b/src/peripherals/spi.ts
index 3167c07..824b13a 100644
--- a/src/peripherals/spi.ts
+++ b/src/peripherals/spi.ts
@@ -63,7 +63,11 @@ export class AVRSPI {
enableMask: SPCR_SPIE,
};
- constructor(private cpu: CPU, private config: SPIConfig, private freqHz: number) {
+ constructor(
+ private cpu: CPU,
+ private config: SPIConfig,
+ private freqHz: number,
+ ) {
const { SPCR, SPSR, SPDR } = config;
cpu.writeHooks[SPDR] = (value: u8) => {
if (!(cpu.data[SPCR] & SPCR_SPE)) {
diff --git a/src/peripherals/timer.ts b/src/peripherals/timer.ts
index 93b9d19..dfbba35 100644
--- a/src/peripherals/timer.ts
+++ b/src/peripherals/timer.ts
@@ -342,7 +342,10 @@ export class AVRTimer {
enableMask: this.config.OCIEC,
};
- constructor(private cpu: CPU, private config: AVRTimerConfig) {
+ constructor(
+ private cpu: CPU,
+ private config: AVRTimerConfig,
+ ) {
this.updateWGMConfig();
this.cpu.readHooks[config.TCNT] = (addr: u8) => {
this.count(false);
diff --git a/src/peripherals/twi.ts b/src/peripherals/twi.ts
index 9af1749..3d0275c 100644
--- a/src/peripherals/twi.ts
+++ b/src/peripherals/twi.ts
@@ -105,7 +105,11 @@ export class AVRTWI {
enableMask: TWCR_TWIE,
};
- constructor(private cpu: CPU, private config: TWIConfig, private freqHz: number) {
+ constructor(
+ private cpu: CPU,
+ private config: TWIConfig,
+ private freqHz: number,
+ ) {
this.updateStatus(STATUS_TWI_IDLE);
this.cpu.writeHooks[config.TWCR] = (value) => {
this.cpu.data[config.TWCR] = value;
diff --git a/src/peripherals/usart.ts b/src/peripherals/usart.ts
index 1b7546b..9babe16 100644
--- a/src/peripherals/usart.ts
+++ b/src/peripherals/usart.ts
@@ -109,7 +109,11 @@ export class AVRUSART {
enableMask: UCSRB_TXCIE,
};
- constructor(private cpu: CPU, private config: USARTConfig, private freqHz: number) {
+ constructor(
+ private cpu: CPU,
+ private config: USARTConfig,
+ private freqHz: number,
+ ) {
this.reset();
this.cpu.writeHooks[config.UCSRA] = (value, oldValue) => {
cpu.data[config.UCSRA] = value & (UCSRA_MPCM | UCSRA_U2X);
diff --git a/src/peripherals/watchdog.ts b/src/peripherals/watchdog.ts
index dc66220..979151f 100644
--- a/src/peripherals/watchdog.ts
+++ b/src/peripherals/watchdog.ts
@@ -57,7 +57,11 @@ export class AVRWatchdog {
enableMask: WDTCSR_WDIE,
};
- constructor(private cpu: CPU, private config: WatchdogConfig, private clock: AVRClock) {
+ constructor(
+ private cpu: CPU,
+ private config: WatchdogConfig,
+ private clock: AVRClock,
+ ) {
const { WDTCSR } = config;
this.cpu.onWatchdogReset = () => {
this.resetWatchdog();
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