3 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/cpu.spec.ts b/src/cpu/cpu.spec.ts
index e62dcc8..d3e0ef0 100644
--- a/src/cpu/cpu.spec.ts
+++ b/src/cpu/cpu.spec.ts
@@ -1,3 +1,4 @@
+import { describe, expect, it } from 'vitest';
 import { AVRClockEventCallback, CPU } from './cpu';
 
 type ITestEvent = [number, number]; // Expected cycles, actual cycles
diff --git a/src/cpu/instruction.spec.ts b/src/cpu/instruction.spec.ts
index 37f0bfd..cf3e547 100644
--- a/src/cpu/instruction.spec.ts
+++ b/src/cpu/instruction.spec.ts
@@ -1,6 +1,7 @@
 import { CPU } from './cpu';
 import { avrInstruction } from './instruction';
 import { assemble } from '../utils/assembler';
+import { describe, it, expect, vi } from 'vitest';
 
 const r0 = 0;
 const r1 = 1;
@@ -1118,7 +1119,7 @@ describe('avrInstruction', () => {
 
   it('should execute `WDR` instruction and call `cpu.onWatchdogReset`', () => {
     loadProgram('WDR');
-    cpu.onWatchdogReset = jest.fn();
+    cpu.onWatchdogReset = vi.fn();
     expect(cpu.onWatchdogReset).not.toHaveBeenCalled();
     avrInstruction(cpu);
     expect(cpu.onWatchdogReset).toHaveBeenCalled();
diff --git a/src/cpu/interrupt.spec.ts b/src/cpu/interrupt.spec.ts
index c64724d..944dbb9 100644
--- a/src/cpu/interrupt.spec.ts
+++ b/src/cpu/interrupt.spec.ts
@@ -1,3 +1,4 @@
+import { describe, expect, it } from 'vitest';
 import { CPU } from './cpu';
 import { avrInterrupt } from './interrupt';