diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu.ts | 9 | ||||
| -rw-r--r-- | src/index.ts | 2 | ||||
| -rw-r--r-- | src/timer.ts | 4 | ||||
| -rw-r--r-- | src/usart.spec.ts | 2 | ||||
| -rw-r--r-- | src/usart.ts | 6 |
5 files changed, 13 insertions, 10 deletions
@@ -9,6 +9,7 @@ import { u16, u8 } from './types'; const registerSpace = 0x100; +// eslint-disable-next-line @typescript-eslint/interface-name-prefix export interface ICPU { readonly data: Uint8Array; readonly dataView: DataView; @@ -21,9 +22,9 @@ export interface ICPU { writeData(addr: u16, value: u8): void; } -export type ICPUMemoryHook = (value: u8, oldValue: u8, addr: u16) => boolean | void; -export interface ICPUMemoryHooks { - [key: number]: ICPUMemoryHook; +export type CPUMemoryHook = (value: u8, oldValue: u8, addr: u16) => boolean | void; +export interface CPUMemoryHooks { + [key: number]: CPUMemoryHook; } export class CPU implements ICPU { @@ -31,7 +32,7 @@ export class CPU implements ICPU { readonly data16 = new Uint16Array(this.data.buffer); readonly dataView = new DataView(this.data.buffer); readonly progBytes = new Uint8Array(this.progMem.buffer); - readonly writeHooks: ICPUMemoryHooks = []; + readonly writeHooks: CPUMemoryHooks = []; pc = 0; cycles = 0; diff --git a/src/index.ts b/src/index.ts index d8f4373..bdf7621 100644 --- a/src/index.ts +++ b/src/index.ts @@ -1,4 +1,4 @@ -export { CPU, ICPU, ICPUMemoryHook, ICPUMemoryHooks } from './cpu'; +export { CPU, ICPU, CPUMemoryHook, CPUMemoryHooks } from './cpu'; export { avrInstruction } from './instruction'; export { avrInterrupt } from './interrupt'; export { AVRTimer, timer0Config, timer1Config, timer2Config } from './timer'; diff --git a/src/timer.ts b/src/timer.ts index ac82ce8..4a120e7 100644 --- a/src/timer.ts +++ b/src/timer.ts @@ -35,7 +35,7 @@ const OCIEB = 4; type u8 = number; -interface ITimerDividers { +interface TimerDividers { 0: number; 1: number; 2: number; @@ -64,7 +64,7 @@ interface AVRTimerConfig { TCCRC: u8; TIMSK: u8; - dividers: ITimerDividers; + dividers: TimerDividers; } export const timer0Config: AVRTimerConfig = { diff --git a/src/usart.spec.ts b/src/usart.spec.ts index dadfc78..222017c 100644 --- a/src/usart.spec.ts +++ b/src/usart.spec.ts @@ -69,7 +69,7 @@ describe('USART', () => { it('should set UDRE and TXC flags after UDR0', () => { const cpu = new CPU(new Uint16Array(1024)); - const usart = new AVRUSART(cpu, usart0Config, FREQ_16MHZ); + new AVRUSART(cpu, usart0Config, FREQ_16MHZ); cpu.writeData(0xc1, 0x8); // UCSR0B <- TXEN cpu.writeData(0xc0, 0); // UCSR0A <- 0 cpu.writeData(0xc6, 0x61); // UDR0 diff --git a/src/usart.ts b/src/usart.ts index 8d5691c..6838736 100644 --- a/src/usart.ts +++ b/src/usart.ts @@ -30,7 +30,8 @@ export const usart0Config: USARTConfig = { export type USARTTransmitCallback = (value: u8) => void; export type USARTLineTransmitCallback = (value: string) => void; -// Register bits +/* eslint-disable @typescript-eslint/no-unused-vars */ +// Register bits: const UCSRA_RXC = 0x80; // USART Receive Complete const UCSRA_TXC = 0x40; // USART Transmit Complete const UCSRA_UDRE = 0x20; // USART Data Register Empty @@ -55,12 +56,13 @@ const UCSRC_USBS = 0x8; // Stop Bit Select const UCSRC_UCSZ1 = 0x4; // Character Size 1 const UCSRC_UCSZ0 = 0x2; // Character Size 0 const UCSRC_UCPOL = 0x1; // Clock Polarity +/* eslint-enable @typescript-eslint/no-unused-vars */ export class AVRUSART { public onByteTransmit: USARTTransmitCallback | null = null; public onLineTransmit: USARTLineTransmitCallback | null = null; - private lineBuffer: string = ''; + private lineBuffer = ''; constructor(private cpu: CPU, private config: USARTConfig, private freqMHz: number) { this.cpu.writeHooks[config.UCSRA] = (value) => { |